Thumb uses a special register allocation order to increase the use of low registers.

Thumb uses a special register allocation order to increase the use of low
registers.  Oddly enough, LR appears before R12, which means that LR must
be saved and restored even if R12 is available.  Swapping R12 and LR means
this simple example now uses R12 as a temporary (just like ARM):

int f(long long a, long long b)
{
  if (a < b) return 1;
  return a + b;
}

    gcc/
	* config/arm/arm.c (thumb_core_reg_alloc_order): Swap R12 and R14.

From-SVN: r243744

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 003f0120607273f86f816564f3b8657baf1595d5..daa0458c6f2ac1f692fccd31d832bd5668685211 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,7 @@
+2016-12-16  Wilco Dijkstra  <wdijkstr@arm.com>
+
+       * config/arm/arm.c (thumb_core_reg_alloc_order): Swap R12 and R14.
+
 2016-12-16  Claudiu Zissulescu  <claziss@synopsys.com>
 
        * config/arc/arc.md (call_prof): Remove.

diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
index 899c001bf89753fcba8d88cedcb6cb482563946b..d0104f99a2e91df80d774c833522306d396b09d1 100644 (file)
--- a/gcc/config/arm/arm.c
+++ b/gcc/config/arm/arm.c
@@ -27633,7 +27633,7 @@ arm_mangle_type (const_tree type)
 static const int thumb_core_reg_alloc_order[] =
 {
    3,  2,  1,  0,  4,  5,  6,  7,
-  14, 12,  8,  9, 10, 11
+  12, 14,  8,  9, 10, 11
 };
 
 /* Adjust register allocation order when compiling for Thumb.  */