[ARM] PR target/78439: Update movdi constraints for Cortex-A8 tuning to handle LDRD...

	PR target/78439
	* config/arm/vfp.md (*movdi_vfp_cortexa8): Use 'q' constraints for the
	register operand in alternatives 4,5,6.

	* gcc.c-torture/compile/pr78439.c: New test.

From-SVN: r242695

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index f5e1e5412d22839b88d1b2c61519705f71f84962..3dc1af0fc336c2d04ad30a6d1e2b32c5216229a3 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,9 @@
+2016-11-22  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
+
+       PR target/78439
+       * config/arm/vfp.md (*movdi_vfp_cortexa8): Use 'q' constraints for the
+       register operand in alternatives 4,5,6.
+
 2016-11-22  Thomas Preud'homme  <thomas.preudhomme@arm.com>
 
        PR target/77904

diff --git a/gcc/config/arm/vfp.md b/gcc/config/arm/vfp.md
index 2051f1018f1cbff9c5bf044e71304d78e615458e..ce56e160c043264fd41077e075896760644cd9a5 100644 (file)
--- a/gcc/config/arm/vfp.md
+++ b/gcc/config/arm/vfp.md
@@ -355,8 +355,8 @@
 )
 
 (define_insn "*movdi_vfp_cortexa8"
-  [(set (match_operand:DI 0 "nonimmediate_di_operand" "=r,r,r,r,r,r,m,w,!r,w,w, Uv")
-       (match_operand:DI 1 "di_operand"              "r,rDa,Db,Dc,mi,mi,r,r,w,w,Uvi,w"))]
+  [(set (match_operand:DI 0 "nonimmediate_di_operand" "=r,r,r,r,q,q,m,w,!r,w,w, Uv")
+       (match_operand:DI 1 "di_operand"                "r,rDa,Db,Dc,mi,mi,q,r,w,w,Uvi,w"))]
   "TARGET_32BIT && TARGET_HARD_FLOAT && arm_tune == TARGET_CPU_cortexa8
     && (   register_operand (operands[0], DImode)
         || register_operand (operands[1], DImode))

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index edcc79eec2ff36aef828a91f23d03a9f901dfaed..a9ef58c57db9ea452569babf4c1776afec93962f 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,8 @@
+2016-11-22  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
+
+       PR target/78439
+       * gcc.c-torture/compile/pr78439.c: New test.
+
 2016-11-22  Thomas Preud'homme  <thomas.preudhomme@arm.com>
 
        PR target/77904

diff --git a/gcc/testsuite/gcc.c-torture/compile/pr78439.c b/gcc/testsuite/gcc.c-torture/compile/pr78439.c
new file mode 100644 (file)
index 0000000..a8af86b
--- /dev/null
+++ b/gcc/testsuite/gcc.c-torture/compile/pr78439.c
@@ -0,0 +1,56 @@
+/* PR target/78439.  */
+
+enum demangle_component_type
+{
+  DEMANGLE_COMPONENT_THROW_SPEC
+};
+struct demangle_component
+{
+  enum demangle_component_type type;
+  struct
+  {
+    struct
+    {
+      struct demangle_component *left;
+      struct demangle_component *right;
+    };
+  };
+};
+
+int a, b;
+
+struct d_info
+{
+  struct demangle_component *comps;
+  int next_comp;
+  int num_comps;
+  struct demangle_component *subs;
+  int num_subs;
+  int is_conversion;
+};
+
+void
+fn1 (int p1, struct d_info *p2)
+{
+  p2->num_comps = 2 * p1;
+  p2->next_comp = p2->num_subs = p1;
+  p2->is_conversion = 0;
+}
+
+int fn3 (int *);
+void fn4 (struct d_info *, int);
+
+void
+fn2 ()
+{
+  int c;
+  struct d_info d;
+  b = 0;
+  c = fn3 (&a);
+  fn1 (c, &d);
+  struct demangle_component e[d.num_comps];
+  struct demangle_component *f[d.num_subs];
+  d.comps = e;
+  d.subs = (struct demangle_component *) f;
+  fn4 (&d, 1);
+}