gcc: switch microblaze to version 4.9.x

Switch to gcc 4.9.x for microblaze since it's a better target than
4.8.x, and also add a build patch that fixes (e)glibc build issues.
Hence disable 4.8.x for microblaze.

Signed-off-by: Gustavo Zacarias <gustavo@zacarias.com.ar>
Signed-off-by: Peter Korsgaard <peter@korsgaard.com>

diff --git a/package/gcc/4.9.0/840-microblaze-enable-dwarf-eh-support.patch b/package/gcc/4.9.0/840-microblaze-enable-dwarf-eh-support.patch
new file mode 100644 (file)
index 0000000..e116e2b
--- /dev/null
+++ b/package/gcc/4.9.0/840-microblaze-enable-dwarf-eh-support.patch
@@ -0,0 +1,169 @@
+Fetched from Xilinx gcc git at https://github.com/Xilinx/gcc
+
+From 23c35173490ac2d6348a668dfc9c1a6eb62171f2 Mon Sep 17 00:00:00 2001
+From: "Edgar E. Iglesias" <edgar.iglesias@gmail.com>
+Date: Mon, 18 Jun 2012 20:18:13 +0200
+Subject: [PATCH] [Patch, microblaze]: Enable DWARF exception handling support.
+
+Changelog
+
+2013-03-18  Edgar E. Iglesias <edgar.iglesias@xilinx.com>
+            David Holsgrove <david.holsgrove@xilinx.com>
+
+ * common/config/microblaze/microblaze-common.c: Remove
+   TARGET_EXCEPT_UNWIND_INFO definition.
+ * config/microblaze/microblaze-protos.h: Add
+   microblaze_eh_return prototype.
+ * gcc/config/microblaze/microblaze.c: (microblaze_must_save_register,
+   microblaze_expand_epilogue, microblaze_return_addr): Handle
+   calls_eh_return
+   (microblaze_eh_return): New function.
+ * gcc/config/microblaze/microblaze.h: Define RETURN_ADDR_OFFSET,
+   EH_RETURN_DATA_REGNO, MB_EH_STACKADJ_REGNUM, EH_RETURN_STACKADJ_RTX,
+   ASM_PREFERRED_EH_DATA_FORMAT
+ * gcc/config/microblaze/microblaze.md: Define eh_return pattern.
+
+Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com>
+Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
+---
+ gcc/common/config/microblaze/microblaze-common.c |  3 ---
+ gcc/config/microblaze/microblaze-protos.h        |  1 +
+ gcc/config/microblaze/microblaze.c               | 29 ++++++++++++++++++++----
+ gcc/config/microblaze/microblaze.h               | 15 ++++++++++++
+ gcc/config/microblaze/microblaze.md              | 11 +++++++++
+ 5 files changed, 52 insertions(+), 7 deletions(-)
+
+diff --git a/gcc/common/config/microblaze/microblaze-common.c b/gcc/common/config/microblaze/microblaze-common.c
+index 5835acc..85e6a53 100644
+--- a/gcc/common/config/microblaze/microblaze-common.c
++++ b/gcc/common/config/microblaze/microblaze-common.c
+@@ -39,7 +39,4 @@ static const struct default_options microblaze_option_optimization_table[] =
+ #undef  TARGET_OPTION_OPTIMIZATION_TABLE
+ #define TARGET_OPTION_OPTIMIZATION_TABLE microblaze_option_optimization_table
+ 
+-#undef TARGET_EXCEPT_UNWIND_INFO
+-#define TARGET_EXCEPT_UNWIND_INFO  sjlj_except_unwind_info
+-
+ struct gcc_targetm_common targetm_common = TARGETM_COMMON_INITIALIZER;
+diff --git a/gcc/config/microblaze/microblaze-protos.h b/gcc/config/microblaze/microblaze-protos.h
+index c30ec72..260f4e4 100644
+--- a/gcc/config/microblaze/microblaze-protos.h
++++ b/gcc/config/microblaze/microblaze-protos.h
+@@ -56,6 +56,7 @@ extern bool microblaze_tls_referenced_p (rtx);
+ extern int symbol_mentioned_p (rtx);
+ extern int label_mentioned_p (rtx);
+ extern bool microblaze_cannot_force_const_mem (enum machine_mode, rtx);
++extern void microblaze_eh_return (rtx op0);
+ #endif  /* RTX_CODE */
+ 
+ /* Declare functions in microblaze-c.c.  */
+diff --git a/gcc/config/microblaze/microblaze.c b/gcc/config/microblaze/microblaze.c
+index fe61fce..15166d3 100644
+--- a/gcc/config/microblaze/microblaze.c
++++ b/gcc/config/microblaze/microblaze.c
+@@ -1999,6 +1999,11 @@ microblaze_must_save_register (int regno)
+   if (frame_pointer_needed && (regno == HARD_FRAME_POINTER_REGNUM))
+     return 1;
+ 
++  if (crtl->calls_eh_return
++      && regno == MB_ABI_SUB_RETURN_ADDR_REGNUM) {
++    return 1;
++  }
++
+   if (!crtl->is_leaf)
+     {
+       if (regno == MB_ABI_SUB_RETURN_ADDR_REGNUM)
+@@ -2026,6 +2031,13 @@ microblaze_must_save_register (int regno)
+       return 1;
+     }
+ 
++  if (crtl->calls_eh_return
++      && (regno == EH_RETURN_DATA_REGNO (0)
++          || regno == EH_RETURN_DATA_REGNO (1)))
++    {
++      return 1;
++    }
++
+   return 0;
+ }
+ 
+@@ -3131,6 +3143,12 @@ microblaze_expand_epilogue (void)
+       emit_insn (gen_addsi3 (stack_pointer_rtx, stack_pointer_rtx, fsiz_rtx));
+     }
+ 
++  if (crtl->calls_eh_return)
++    emit_insn (gen_addsi3 (stack_pointer_rtx,
++                           stack_pointer_rtx,
++                           gen_rtx_raw_REG (SImode,
++                                            MB_EH_STACKADJ_REGNUM)));
++
+   emit_jump_insn (gen_return_internal (gen_rtx_REG (Pmode, GP_REG_FIRST +
+                                                   MB_ABI_SUB_RETURN_ADDR_REGNUM)));
+ }
+@@ -3427,10 +3445,13 @@ microblaze_return_addr (int count, rtx frame ATTRIBUTE_UNUSED)
+   if (count != 0)
+     return NULL_RTX;
+ 
+-  return gen_rtx_PLUS (Pmode,
+-                     get_hard_reg_initial_val (Pmode,
+-                                               MB_ABI_SUB_RETURN_ADDR_REGNUM),
+-                     GEN_INT (8));
++  return get_hard_reg_initial_val (Pmode,
++                                   MB_ABI_SUB_RETURN_ADDR_REGNUM);
++}
++
++void microblaze_eh_return (rtx op0)
++{
++  emit_insn (gen_movsi(gen_rtx_MEM(Pmode, stack_pointer_rtx), op0));
+ }
+ 
+ /* Queue an .ident string in the queue of top-level asm statements.
+diff --git a/gcc/config/microblaze/microblaze.h b/gcc/config/microblaze/microblaze.h
+index 4072283..5e9f49c 100644
+--- a/gcc/config/microblaze/microblaze.h
++++ b/gcc/config/microblaze/microblaze.h
+@@ -184,6 +184,21 @@ extern enum pipeline_type microblaze_pipe;
+ #define INCOMING_RETURN_ADDR_RTX                      \
+   gen_rtx_REG (VOIDmode, GP_REG_FIRST + MB_ABI_SUB_RETURN_ADDR_REGNUM)
+ 
++/* Specifies the offset from INCOMING_RETURN_ADDR_RTX and the actual return PC.  */
++#define RETURN_ADDR_OFFSET (8)
++
++/* Describe how we implement __builtin_eh_return.  */
++#define EH_RETURN_DATA_REGNO(N) (((N) < 2) ? MB_ABI_FIRST_ARG_REGNUM + (N) : INVALID_REGNUM)
++
++#define MB_EH_STACKADJ_REGNUM  MB_ABI_INT_RETURN_VAL2_REGNUM
++#define EH_RETURN_STACKADJ_RTX  gen_rtx_REG (Pmode, MB_EH_STACKADJ_REGNUM)
++
++/* Select a format to encode pointers in exception handling data.  CODE
++   is 0 for data, 1 for code labels, 2 for function pointers.  GLOBAL is
++   true if the symbol may be affected by dynamic relocations.  */
++#define ASM_PREFERRED_EH_DATA_FORMAT(CODE,GLOBAL) \
++  ((flag_pic || GLOBAL) ? DW_EH_PE_aligned : DW_EH_PE_absptr)
++
+ /* Use DWARF 2 debugging information by default.  */
+ #define DWARF2_DEBUGGING_INFO
+ #define PREFERRED_DEBUGGING_TYPE DWARF2_DEBUG
+diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md
+index ed6131a..dc2405f 100644
+--- a/gcc/config/microblaze/microblaze.md
++++ b/gcc/config/microblaze/microblaze.md
+@@ -2327,4 +2327,15 @@
+   (set_attr "mode"      "SI")
+   (set_attr "length"    "4")])
+ 
++; This is used in compiling the unwind routines.
++(define_expand "eh_return"
++  [(use (match_operand 0 "general_operand" ""))]
++  ""
++  "
++{
++  microblaze_eh_return(operands[0]);
++  DONE;
++}")
++
+ (include "sync.md")
++
+-- 
+1.8.3.2
+

diff --git a/package/gcc/Config.in.host b/package/gcc/Config.in.host
index 2fe5ca5ae9a741b5ffb43cf5ee25e03a4168c7f4..34a817bdaa1c7638a8a8e496648a61d3ef6c9fab 100644 (file)
--- a/package/gcc/Config.in.host
+++ b/package/gcc/Config.in.host
@@ -9,7 +9,7 @@ choice
        default BR2_GCC_VERSION_4_2_2_AVR32_2_1_5 if BR2_avr32
        default BR2_GCC_VERSION_4_8_X if BR2_aarch64
        default BR2_GCC_VERSION_4_8_ARC if BR2_arc
-       default BR2_GCC_VERSION_4_8_X if BR2_microblaze
+       default BR2_GCC_VERSION_4_9_X if BR2_microblaze
        default BR2_GCC_VERSION_4_5_X if BR2_bfin
        default BR2_GCC_VERSION_4_7_X
        help
@@ -50,7 +50,7 @@ choice
                bool "gcc 4.7.x"
 
        config BR2_GCC_VERSION_4_8_X
-               depends on !BR2_arc && !BR2_avr32 && !BR2_bfin && !BR2_cortex_a12 && !BR2_sparc_sparchfleon && !BR2_sparc_sparchfleonv8 && !BR2_sparc_sparcsfleon && !BR2_sparc_sparcsfleonv8
+               depends on !BR2_microblaze && !BR2_arc && !BR2_avr32 && !BR2_bfin && !BR2_cortex_a12 && !BR2_sparc_sparchfleon && !BR2_sparc_sparchfleonv8 && !BR2_sparc_sparcsfleon && !BR2_sparc_sparcsfleonv8
                select BR2_GCC_NEEDS_MPC
                bool "gcc 4.8.x"