[xcc,sim] rv64 'w' instruction semantics changed

they no longer require their inputs to be canonicalized 32b values, so
this speeds up mixed int/long code sequences.

diff --git a/riscv/insns/srai.h b/riscv/insns/srai.h
index 18fc55bf69ae64fa61ecdfee5b0dbfaeb1e03b85..bb17d2767c6533d3be35c6069d802b53af7fb22b 100644 (file)
--- a/riscv/insns/srai.h
+++ b/riscv/insns/srai.h
@@ -4,5 +4,5 @@ else
 {
   if(SHAMT & 0x20)
     throw trap_illegal_instruction;
-  RD = sext32(sreg_t(RS1) >> SHAMT);
+  RD = sext32(int32_t(RS1) >> SHAMT);
 }

diff --git a/riscv/insns/sraiw.h b/riscv/insns/sraiw.h
index 42d0fc385248e5db4a17fadda8155a3044ef3fea..4c5673007d1dcd9e4d169136c7df2ed8a5041908 100644 (file)
--- a/riscv/insns/sraiw.h
+++ b/riscv/insns/sraiw.h
@@ -1,2 +1,2 @@
 require_xpr64;
-RD = sext32(sreg_t(RS1) >> SHAMTW);
+RD = sext32(int32_t(RS1) >> SHAMTW);