cpu/minerva: update (use new nMigen API)

diff --git a/litex/soc/cores/cpu/minerva/verilog b/litex/soc/cores/cpu/minerva/verilog
index 0518621134dd7a551cac5758d9171a24d0c1578f..fb296e4e48e5ced8dd05f2228d84b4bc18f54f75 160000 (submodule)
--- a/litex/soc/cores/cpu/minerva/verilog
+++ b/litex/soc/cores/cpu/minerva/verilog
@@ -1 +1 @@
-Subproject commit 0518621134dd7a551cac5758d9171a24d0c1578f
+Subproject commit fb296e4e48e5ced8dd05f2228d84b4bc18f54f75