_ABC macro will map and unmap to this new box

diff --git a/techlibs/ice40/arith_map.v b/techlibs/ice40/arith_map.v
index 4449fdc1bf9961acce2d4f40dc204ee919e68165..6d45e4a6ba6ed3f1316e0856a6f3fbacb878b6d5 100644 (file)
--- a/techlibs/ice40/arith_map.v
+++ b/techlibs/ice40/arith_map.v
@@ -44,6 +44,15 @@ module _80_ice40_alu (A, B, CI, BI, X, Y, CO);
 
        genvar i;
        generate for (i = 0; i < Y_WIDTH; i = i + 1) begin:slice
+`ifdef _ABC
+               \$__ICE40_CARRY_LUT4 carry (
+                       .A(AA[i]),
+                       .B(BB[i]),
+                       .CI(C[i]),
+                       .CO(CO[i]),
+            .O(Y[i])
+               );
+`else
                SB_CARRY carry (
                        .I0(AA[i]),
                        .I1(BB[i]),
@@ -63,6 +72,7 @@ module _80_ice40_alu (A, B, CI, BI, X, Y, CO);
                        .I3(C[i]),
                        .O(Y[i])
                );
+`endif
        end endgenerate
 
        assign X = AA ^ BB;

diff --git a/techlibs/ice40/cells_map.v b/techlibs/ice40/cells_map.v
index 759549e30cc183bb662c805fa86863f3e6fce1c3..5dca63e199c070fda73eebdaf7cc4e719256858c 100644 (file)
--- a/techlibs/ice40/cells_map.v
+++ b/techlibs/ice40/cells_map.v
@@ -61,3 +61,27 @@ module \$lut (A, Y);
   endgenerate
 endmodule
 `endif
+
+`ifdef _ABC
+module \$__ICE40_CARRY_LUT4 (output CO, O, input A, B, CI);
+  SB_CARRY carry (
+    .I0(A),
+    .I1(B),
+    .CI(CI),
+    .CO(CO)
+  );
+  SB_LUT4 #(
+    //         I0: 1010 1010 1010 1010
+    //         I1: 1100 1100 1100 1100
+    //         I2: 1111 0000 1111 0000
+    //         I3: 1111 1111 0000 0000
+    .LUT_INIT(16'b 0110_1001_1001_0110)
+  ) adder (
+    .I0(1'b0),
+    .I1(A),
+    .I2(B),
+    .I3(CI),
+    .O(O)
+  );
+endmodule
+`endif