+2014-03-03 Nick Clifton <nickc@redhat.com>
+
+ * config/rl78/rl78-real.md (cbranchsi4_real_signed): Add
+ anti-cacnonical alternatives.
+ (negandhi3_real): New pattern.
+ * config/rl78/rl78-virt.md (negandhi3_virt): New pattern.
+
2014-03-03 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
* config/avr/avr-mcus.def: Remove atxmega16x1.
group, also set all symbols to local.
2014-03-02 Jan Hubicka <hubicka@ucw.cz>
-
+
PR ipa/60306
Revert:
PR bootstrap/52466
PR target/46898
* config/lm32/lm32.c (lm32_legitimate_constant_p): Remove, as incorrect.
- (TARGET_LEGITIMATE_CONSTANT_P): Undefine, as not needed.
+ (TARGET_LEGITIMATE_CONSTANT_P): Undefine, as not needed.
* config/lm32/lm32.md (movsi_insn): Add 32-bit immediate support.
- (simple_return, *simple_return): New patterns
+ (simple_return, *simple_return): New patterns
* config/lm32/predicates.md (movsi_rhs_operand): Remove as obsolete.
* configure.ac (force_sjlj_exceptions): Force sjlj exceptions for lm32.
void msp430_fixup_compare_operands (enum machine_mode, rtx *);
int msp430_hard_regno_mode_ok (int, enum machine_mode);
int msp430_hard_regno_nregs (int, enum machine_mode);
+bool msp430_hwmult_enabled (void);
rtx msp430_incoming_return_addr_rtx (void);
void msp430_init_cumulative_args (CUMULATIVE_ARGS *, tree, rtx, tree, int);
int msp430_initial_elimination_offset (int, int);
+bool msp430_is_f5_mcu (void);
bool msp430_is_interrupt_func (void);
const char * msp430x_logical_shift_right (rtx);
const char * msp430_mcu_name (void);
void msp430_register_pragmas (void);
rtx msp430_return_addr_rtx (int);
void msp430_split_movsi (rtx *);
-rtx msp430_subreg (enum machine_mode, rtx, enum machine_mode, int);
void msp430_start_function (FILE *, const char *, tree);
+rtx msp430_subreg (enum machine_mode, rtx, enum machine_mode, int);
#endif /* GCC_MSP430_PROTOS_H */
#include "msp430-protos.h"
#include "dumpfile.h"
#include "opts.h"
-
\f
static void msp430_compute_frame_info (void);
\f
-/* Run-time Target Specification */
+/* Run-time Target Specification. */
-bool msp430x = false;
+bool msp430x = true;
struct GTY(()) machine_function
{
#undef TARGET_OPTION_OVERRIDE
#define TARGET_OPTION_OVERRIDE msp430_option_override
-/* This list provides a set of known MCU names that support the MSP430X
- ISA. The list has been provided by TI and should be kept in sync with
- the ones in:
-
- gcc/config/msp430/t-msp430
- gas/config/tc-msp430.c
-
- FIXME: We ought to read the names in from a file at run, rather
- than having them built in like this. Also such a file should be
- shared with gas. */
-
-static const char * msp430x_names [] =
-{
- "cc430f5123", "cc430f5125", "cc430f5133", "cc430f5135", "cc430f5137",
- "cc430f5143", "cc430f5145", "cc430f5147", "cc430f6125", "cc430f6126",
- "cc430f6127", "cc430f6135", "cc430f6137", "cc430f6143", "cc430f6145",
- "cc430f6147", "msp430bt5190", "msp430cg4616", "msp430cg4617", "msp430cg4618",
- "msp430cg4619", "msp430f2416", "msp430f2417", "msp430f2418", "msp430f2419",
- "msp430f2616", "msp430f2617", "msp430f2618", "msp430f2619", "msp430f4616",
- "msp430f46161", "msp430f4617", "msp430f46171", "msp430f4618", "msp430f46181",
- "msp430f4619", "msp430f46191", "msp430f47126", "msp430f47127", "msp430f47163",
- "msp430f47166", "msp430f47167", "msp430f47173", "msp430f47176", "msp430f47177",
- "msp430f47183", "msp430f47186", "msp430f47187", "msp430f47193", "msp430f47196",
- "msp430f47197", "msp430f5131", "msp430f5132", "msp430f5151", "msp430f5152",
- "msp430f5171", "msp430f5172", "msp430f5212", "msp430f5213", "msp430f5214",
- "msp430f5217", "msp430f5218", "msp430f5219", "msp430f5222", "msp430f5223",
- "msp430f5224", "msp430f5227", "msp430f5228", "msp430f5229", "msp430f5304",
- "msp430f5308", "msp430f5309", "msp430f5310", "msp430f5324", "msp430f5325",
- "msp430f5326", "msp430f5327", "msp430f5328", "msp430f5329", "msp430f5333",
- "msp430f5335", "msp430f5336", "msp430f5338", "msp430f5340", "msp430f5341",
- "msp430f5342", "msp430f5358", "msp430f5359", "msp430f5418", "msp430f5418a",
- "msp430f5419", "msp430f5419a", "msp430f5435", "msp430f5435a", "msp430f5436",
- "msp430f5436a", "msp430f5437", "msp430f5437a", "msp430f5438", "msp430f5438a",
- "msp430f5500", "msp430f5501", "msp430f5502", "msp430f5503", "msp430f5504",
- "msp430f5505", "msp430f5506", "msp430f5507", "msp430f5508", "msp430f5509",
- "msp430f5510", "msp430f5513", "msp430f5514", "msp430f5515", "msp430f5517",
- "msp430f5519", "msp430f5521", "msp430f5522", "msp430f5524", "msp430f5525",
- "msp430f5526", "msp430f5527", "msp430f5528", "msp430f5529", "msp430f5630",
- "msp430f5631", "msp430f5632", "msp430f5633", "msp430f5634", "msp430f5635",
- "msp430f5636", "msp430f5637", "msp430f5638", "msp430f5658", "msp430f5659",
- "msp430f6433", "msp430f6435", "msp430f6436", "msp430f6438", "msp430f6458",
- "msp430f6459", "msp430f6630", "msp430f6631", "msp430f6632", "msp430f6633",
- "msp430f6634", "msp430f6635", "msp430f6636", "msp430f6637", "msp430f6638",
- "msp430f6658", "msp430f6659", "msp430f6720", "msp430f6721", "msp430f6723",
- "msp430f6724", "msp430f6725", "msp430f6726", "msp430f6730", "msp430f6731",
- "msp430f6733", "msp430f6734", "msp430f6735", "msp430f6736", "msp430f6745",
- "msp430f67451", "msp430f6746", "msp430f67461", "msp430f6747", "msp430f67471",
- "msp430f6748", "msp430f67481", "msp430f6749", "msp430f67491", "msp430f6765",
- "msp430f67651", "msp430f6766", "msp430f67661", "msp430f6767", "msp430f67671",
- "msp430f6768", "msp430f67681", "msp430f6769", "msp430f67691", "msp430f6775",
- "msp430f67751", "msp430f6776", "msp430f67761", "msp430f6777", "msp430f67771",
- "msp430f6778", "msp430f67781", "msp430f6779", "msp430f67791", "msp430fg4616",
- "msp430fg4617", "msp430fg4618", "msp430fg4619", "msp430fr5720", "msp430fr5721",
- "msp430fr5722", "msp430fr5723", "msp430fr5724", "msp430fr5725", "msp430fr5726",
- "msp430fr5727", "msp430fr5728", "msp430fr5729", "msp430fr5730", "msp430fr5731",
- "msp430fr5732", "msp430fr5733", "msp430fr5734", "msp430fr5735", "msp430fr5736",
- "msp430fr5737", "msp430fr5738", "msp430fr5739", "msp430fr5949", "msp430fr5969",
- "msp430sl5438a","msp430x241x", "msp430x26x", "msp430x461x1", "msp430x46x",
- "msp430x471x3", "msp430x471x6", "msp430x471x7", "msp430xg46x"
+static const char * msp430_mcu_names [] =
+{
+"msp430afe221", "msp430afe222", "msp430afe223", "msp430afe231",
+"msp430afe232", "msp430afe233", "msp430afe251", "msp430afe252",
+"msp430afe253", "msp430c091", "msp430c092", "msp430c111",
+"msp430c1111", "msp430c112", "msp430c1121", "msp430c1331",
+"msp430c1351", "msp430c311s", "msp430c312", "msp430c313",
+"msp430c314", "msp430c315", "msp430c323", "msp430c325",
+"msp430c336", "msp430c337", "msp430c412", "msp430c413",
+"msp430e112", "msp430e313", "msp430e315", "msp430e325",
+"msp430e337", "msp430f110", "msp430f1101", "msp430f1101a",
+"msp430f1111", "msp430f1111a", "msp430f112", "msp430f1121",
+"msp430f1121a", "msp430f1122", "msp430f1132", "msp430f122",
+"msp430f1222", "msp430f123", "msp430f1232", "msp430f133",
+"msp430f135", "msp430f147", "msp430f1471", "msp430f148",
+"msp430f1481", "msp430f149", "msp430f1491", "msp430f155",
+"msp430f156", "msp430f157", "msp430f1610", "msp430f1611",
+"msp430f1612", "msp430f167", "msp430f168", "msp430f169",
+"msp430f2001", "msp430f2002", "msp430f2003", "msp430f2011",
+"msp430f2012", "msp430f2013", "msp430f2101", "msp430f2111",
+"msp430f2112", "msp430f2121", "msp430f2122", "msp430f2131",
+"msp430f2132", "msp430f2232", "msp430f2234", "msp430f2252",
+"msp430f2254", "msp430f2272", "msp430f2274", "msp430f233",
+"msp430f2330", "msp430f235", "msp430f2350", "msp430f2370",
+"msp430f2410", "msp430f247", "msp430f2471", "msp430f248",
+"msp430f2481", "msp430f249", "msp430f2491", "msp430f412",
+"msp430f413", "msp430f4132", "msp430f415", "msp430f4152",
+"msp430f417", "msp430f423", "msp430f423a", "msp430f425",
+"msp430f4250", "msp430f425a", "msp430f4260", "msp430f427",
+"msp430f4270", "msp430f427a", "msp430f435", "msp430f4351",
+"msp430f436", "msp430f4361", "msp430f437", "msp430f4371",
+"msp430f438", "msp430f439", "msp430f447", "msp430f448",
+"msp430f4481", "msp430f449", "msp430f4491", "msp430f477",
+"msp430f478", "msp430f4783", "msp430f4784", "msp430f479",
+"msp430f4793", "msp430f4794", "msp430fe423", "msp430fe4232",
+"msp430fe423a", "msp430fe4242", "msp430fe425", "msp430fe4252",
+"msp430fe425a", "msp430fe427", "msp430fe4272", "msp430fe427a",
+"msp430fg4250", "msp430fg4260", "msp430fg4270", "msp430fg437",
+"msp430fg438", "msp430fg439", "msp430fg477", "msp430fg478",
+"msp430fg479", "msp430fw423", "msp430fw425", "msp430fw427",
+"msp430fw428", "msp430fw429", "msp430g2001", "msp430g2101",
+"msp430g2102", "msp430g2111", "msp430g2112", "msp430g2113",
+"msp430g2121", "msp430g2131", "msp430g2132", "msp430g2152",
+"msp430g2153", "msp430g2201", "msp430g2202", "msp430g2203",
+"msp430g2210", "msp430g2211", "msp430g2212", "msp430g2213",
+"msp430g2221", "msp430g2230", "msp430g2231", "msp430g2232",
+"msp430g2233", "msp430g2252", "msp430g2253", "msp430g2302",
+"msp430g2303", "msp430g2312", "msp430g2313", "msp430g2332",
+"msp430g2333", "msp430g2352", "msp430g2353", "msp430g2402",
+"msp430g2403", "msp430g2412", "msp430g2413", "msp430g2432",
+"msp430g2433", "msp430g2444", "msp430g2452", "msp430g2453",
+"msp430g2513", "msp430g2533", "msp430g2544", "msp430g2553",
+"msp430g2744", "msp430g2755", "msp430g2855", "msp430g2955",
+"msp430i2020", "msp430i2021", "msp430i2030", "msp430i2031",
+"msp430i2040", "msp430i2041", "msp430l092", "msp430p112",
+"msp430p313", "msp430p315", "msp430p315s", "msp430p325",
+"msp430p337", "msp430tch5e"
};
/* Generate a C preprocessor symbol based upon the MCU selected by the user.
if (target_cpu)
{
if (strcasecmp (target_cpu, "msp430x") == 0
- || strcasecmp (target_cpu, "msp430xv2") == 0)
+ || strcasecmp (target_cpu, "msp430xv2") == 0
+ || strcasecmp (target_cpu, "430x") == 0
+ || strcasecmp (target_cpu, "430xv2") == 0)
msp430x = true;
+ else if (strcasecmp (target_cpu, "msp430") == 0
+ || strcasecmp (target_cpu, "430") == 0)
+ msp430x = false;
+ else
+ error ("unrecognised argument of -mcpu: %s", target_cpu);
}
-
+
if (target_mcu)
{
- unsigned i;
+ int i;
- for (i = ARRAY_SIZE (msp430x_names); i--;)
- if (strcasecmp (target_mcu, msp430x_names[i]) == 0)
- {
- msp430x = true;
- break;
- }
- /* Note - it is not an error if we did not recognize the MCU
- name. The msp430x_names array only contains those MCU names
- which are currently known to use the MSP430X ISA. There are
- lots of other MCUs which just use the MSP430 ISA. */
-
- /* We also recognise two generic MCU 430X names. They do not
- appear in the msp430x_names table as we want to be able to
- generate special C preprocessor defines for them. That is
- why we set target_mcu to NULL. */
- if (strcasecmp (target_mcu, "msp430x") == 0
- || strcasecmp (target_mcu, "msp430xv2") == 0)
+ /* If we are given an MCU name, we assume that it supports 430X.
+ Then we check to see if it is one of the known MCUs that only
+ supports 430. */
+ msp430x = true;
+
+ /* For backwards compatibility we recognise two generic MCU
+ 430X names. However we want to be able to generate special C
+ preprocessor defines for them, which is why we set target_mcu
+ to NULL. */
+ if (strcasecmp (target_mcu, "msp430") == 0)
{
- msp430x = true;
+ msp430x = false;
target_mcu = NULL;
}
+ else if (strcasecmp (target_mcu, "msp430x") == 0
+ || strcasecmp (target_mcu, "msp430xv2") == 0)
+ target_mcu = NULL;
+ else
+ for (i = ARRAY_SIZE (msp430_mcu_names); i--;)
+ if (strcasecmp (msp430_mcu_names[i], target_mcu) == 0)
+ {
+ msp430x = false;
+ break;
+ }
+ /* It is not an error if we do not match the MCU name. There are
+ hundreds of them. */
}
if (TARGET_LARGE && !msp430x)
bool
msp430_is_interrupt_func (void)
{
+ if (current_function_decl == NULL)
+ return false;
return is_attr_func ("interrupt");
}
if (flag_stack_usage_info)
current_function_static_stack_size = cfun->machine->framesize;
-
+
if (crtl->args.pretend_args_size)
{
rtx note;
gcc_assert (crtl->args.pretend_args_size == 2);
-
+
p = emit_insn (gen_grow_and_swap ());
/* Document the stack decrement... */
else
addr = stack_pointer_rtx;
- XVECEXP (note, 0, j + 1) =
+ XVECEXP (note, 0, j + 1) =
F (gen_rtx_SET (VOIDmode,
gen_rtx_MEM (Pmode, addr),
gen_rtx_REG (Pmode, i - j)) );
/* GCC does not use helper functions for negation */
/* Integer multiply, divide, remainder. */
- /* Note: gcc doesn't know about hardware multiply options (yet?) */
{ "__mulhi3", "__mspabi_mpyi" },
{ "__mulsi3", "__mspabi_mpyl" },
{ "__muldi3", "__mspabi_mpyll" },
{ NULL, NULL }
};
+/* Returns true if the current MCU is an F5xxx series. */
+bool
+msp430_is_f5_mcu (void)
+{
+ if (target_mcu == NULL)
+ return false;
+ return strncasecmp (target_mcu, "msp430f5", 8) == 0;
+}
+
+/* Returns true id the current MCU has a second generation 32-bit hardware multiplier. */
+static bool
+has_32bit_hw_mult (void)
+{
+ static const char * known_32bit_mult_mcus [] =
+ {
+ "msp430f4783", "msp430f4793", "msp430f4784",
+ "msp430f4794", "msp430f47126", "msp430f47127",
+ "msp430f47163", "msp430f47173", "msp430f47183",
+ "msp430f47193", "msp430f47166", "msp430f47176",
+ "msp430f47186", "msp430f47196", "msp430f47167",
+ "msp430f47177", "msp430f47187", "msp430f47197"
+ };
+ int i;
+ if (target_mcu == NULL)
+ return false;
+
+ for (i = ARRAY_SIZE (known_32bit_mult_mcus); i--;)
+ if (strcasecmp (target_mcu, known_32bit_mult_mcus[i]) == 0)
+ return true;
+
+ return false;
+}
+
+/* Returns true if hardware multiply is supported by the chosen MCU. */
+bool
+msp430_hwmult_enabled (void)
+{
+ if (target_mcu == NULL)
+ return false;
+
+ if (!ENABLE_HWMULT)
+ return false;
+
+ if (msp430_is_interrupt_func ())
+ return false;
+
+ if (msp430_is_f5_mcu () || has_32bit_hw_mult ())
+ return true;
+
+ return false;
+}
+
/* This function does the same as the default, but it will replace GCC
function names with the MSPABI-specified ones. */
void
int i;
for (i = 0; helper_function_name_mappings [i].gcc_name; i++)
- if (! strcmp (helper_function_name_mappings [i].gcc_name, name))
+ if (strcmp (helper_function_name_mappings [i].gcc_name, name) == 0)
{
- fputs (helper_function_name_mappings [i].ti_name, file);
- return;
+ name = helper_function_name_mappings [i].ti_name;
+ break;
}
+ /* If we have been given a specific MCU name then we may be
+ able to make use of its hardware multiply capabilities. */
+ if (msp430_hwmult_enabled ())
+ {
+ if (strcmp ("__mspabi_mpyi", name) == 0)
+ {
+ if (msp430_is_f5_mcu ())
+ name = "__mulhi2_f5";
+ else
+ name = "__mulhi2";
+ }
+ else if (strcmp ("__mspabi_mpyl", name) == 0)
+ {
+ if (msp430_is_f5_mcu ())
+ name = "__mulsi2_f5";
+ else if (has_32bit_hw_mult ())
+ name = "__mulsi2_hw32";
+ else
+ name = "__mulsi2";
+ }
+ }
+
fputs (name, file);
}
op = gen_rtx_REG (Pmode, REGNO (op) + 2);
break;
case CONST_INT:
- op = GEN_INT (INTVAL (op) >> 32);
+ op = GEN_INT ((long long) INTVAL (op) >> 32);
letter = 0;
break;
default:
op = gen_rtx_REG (Pmode, REGNO (op) + 3);
break;
case CONST_INT:
- op = GEN_INT (INTVAL (op) >> 48);
+ op = GEN_INT ((long long) INTVAL (op) >> 48);
letter = 0;
break;
default:
if (! msp430x)
/* Note: This sequence is approximately the same length as invoking a helper
function to perform the sign-extension, as in:
-
+
MOV.W %1, %L0
MOV.W %1, r12
CALL __mspabi_srai_15
but this version does not involve any function calls or using argument
registers, so it reduces register pressure. */
return "MOV.W\t%1, %L0 { BIT.W\t#0x8000, %L0 { SUBC.W\t%H0, %H0 { INV.W\t%H0, %H0"; /* 10-bytes. */
-
+
if (REGNO (operands[0]) + 1 == REGNO (operands[1]))
/* High word of dest == source word. */
return "MOV.W\t%1, %L0 { RPT\t#15 { RRAX.W\t%H0"; /* 6-bytes. */
|| INTVAL (amount) >= 16)
return "# nop logical shift.";
- if (INTVAL (amount) > 0
+ if (INTVAL (amount) > 0
&& INTVAL (amount) < 5)
return "rrum.w\t%2, %0"; /* Two bytes. */
- if (INTVAL (amount) > 4
+ if (INTVAL (amount) > 4
&& INTVAL (amount) < 9)
return "rrum.w\t#4, %0 { rrum.w\t%Y2, %0 "; /* Four bytes. */
#undef ASM_DECLARE_FUNCTION_NAME
#define ASM_DECLARE_FUNCTION_NAME(FILE, NAME, DECL) \
msp430_start_function ((FILE), (NAME), (DECL))
+
+#define TARGET_HAS_NO_HW_DIVIDE (! TARGET_HWMULT)
UNS_REFSYM_NEED_EXIT
])
-
+
(include "predicates.md")
(include "constraints.md")
(define_insn "grow_and_swap"
[(unspec_volatile [(const_int 0)] UNS_GROW_AND_SWAP)]
""
- { if (TARGET_LARGE)
- return "SUBA\t#2, r1 \n MOVX.A\t2(r1), 0(r1)";
- return "SUB\t#2, r1 \n MOV.W\t2(r1), 0(r1)";
- }
- )
+ "*
+ if (TARGET_LARGE)
+ return \"SUBA\t#2, r1 { MOVX.A\t2(r1), 0(r1)\";
+ return \"SUB\t#2, r1 { MOV.W\t2(r1), 0(r1)\";
+ "
+)
(define_insn "swap_and_shrink"
[(unspec_volatile [(const_int 0)] UNS_SWAP_AND_SHRINK)]
""
- { return TARGET_LARGE
- ? "MOVX.A\t0(r1), 2(r1) \n ADDA\t#2, SP"
- : "MOV.W\t0(r1), 2(r1) \n ADD\t#2, SP";
- })
+ "* return TARGET_LARGE
+ ? \"MOVX.A\t0(r1), 2(r1) { ADDA\t#2, SP\"
+ : \"MOV.W\t0(r1), 2(r1) { ADD\t#2, SP\";
+ ")
; I set LOAD_EXTEND_OP and WORD_REGISTER_OPERATIONS, but gcc puts in a
; zero_extend anyway. Catch it here.
return \"SUB.W\t#0, %0 { AND.W\t%2, %0\";
"
)
+
+(define_insn "mulhisi3"
+ [(set (match_operand:SI 0 "register_operand" "=r")
+ (mult:SI (sign_extend:SI (match_operand:HI 1 "register_operand" "%0"))
+ (sign_extend:SI (match_operand:HI 2 "register_operand" "r"))))]
+ "optimize > 2 && msp430_hwmult_enabled ()"
+ "*
+ if (msp430_is_f5_mcu ())
+ return \"MOV.W %1, &0x04C2 { MOV.W %2, &0x04C8 { MOV.W &0x04CA, %L0 { MOV.W &0x04CC, %H0\";
+ else
+ return \"MOV.W %1, &0x0132 { MOV.W %2, &0x0138 { MOV.W &0x013A, %L0 { MOV.W &0x013C, %H0\";
+ "
+)
+
+(define_insn "umulhisi3"
+ [(set (match_operand:SI 0 "register_operand" "=r")
+ (mult:SI (zero_extend:SI (match_operand:HI 1 "register_operand" "%0"))
+ (zero_extend:SI (match_operand:HI 2 "register_operand" "r"))))]
+ "optimize > 2 && msp430_hwmult_enabled ()"
+ "*
+ if (msp430_is_f5_mcu ())
+ return \"MOV.W %1, &0x04C0 { MOV.W %2, &0x04C8 { MOV.W &0x04CA, %L0 { MOV.W &0x04CC, %H0\";
+ else
+ return \"MOV.W %1, &0x0130 { MOV.W %2, &0x0138 { MOV.W &0x013A, %L0 { MOV.W &0x013C, %H0\";
+ "
+)
+
+(define_insn "mulsidi3"
+ [(set (match_operand:DI 0 "register_operand" "=r")
+ (mult:DI (sign_extend:DI (match_operand:SI 1 "register_operand" "%0"))
+ (sign_extend:DI (match_operand:SI 2 "register_operand" "r"))))]
+ "optimize > 2 && msp430_hwmult_enabled ()"
+ "*
+ if (msp430_is_f5_mcu ())
+ return \"MOV.W %L1, &0x04D4 { MOV.W %H1, &0x04D6 { MOV.W %L2, &0x04E0 { MOV.W %H2, &0x04E2 { MOV.W &0x04E4, %A0 { MOV.W &0x04E6, %B0 { MOV.W &0x04E8, %C0 { MOV.W &0x04EA, %D0\";
+ else
+ return \"MOV.W %L1, &0x0144 { MOV.W %H1, &0x0146 { MOV.W %L2, &0x0150 { MOV.W %H2, &0x0152 { MOV.W &0x0154, %A0 { MOV.W &0x0156, %B0 { MOV.W &0x0158, %C0 { MOV.W &0x015A, %D0\";
+ "
+)
+
+(define_insn "umulsidi3"
+ [(set (match_operand:DI 0 "register_operand" "=r")
+ (mult:DI (zero_extend:DI (match_operand:SI 1 "register_operand" "%0"))
+ (zero_extend:DI (match_operand:SI 2 "register_operand" "r"))))]
+ "optimize > 2 && msp430_hwmult_enabled ()"
+ "*
+ if (msp430_is_f5_mcu ())
+ return \"MOV.W %L1, &0x04D0 { MOV.W %H1, &0x04D2 { MOV.W %L2, &0x04E0 { MOV.W %H2, &0x04E2 { MOV.W &0x04E4, %A0 { MOV.W &0x04E6, %B0 { MOV.W &0x04E8, %C0 { MOV.W &0x04EA, %D0\";
+ else
+ return \"MOV.W %L1, &0x0140 { MOV.W %H1, &0x0141 { MOV.W %L2, &0x0150 { MOV.W %H2, &0x0152 { MOV.W &0x0154, %A0 { MOV.W &0x0156, %B0 { MOV.W &0x0158, %C0 { MOV.W &0x015A, %D0\";
+ "
+)
Force assembly output to always use hex constants
mmcu=
-Target Joined RejectNegative Var(target_mcu)
+Target ToLower Joined RejectNegative Var(target_mcu)
Specify the MCU to build for.
mcpu=
minrt
Target Report Mask(MINRT) RejectNegative
Use a minimum runtime (no static initializers or ctors) for memory-constrained devices.
+
+mhwmult
+Target Report Var(ENABLE_HWMULT, 1) Init(1)
+Enable hardware multiply (except in interrupt routines)
# Enable multilibs:
-MULTILIB_OPTIONS = mcpu=msp430x mlarge
-MULTILIB_DIRNAMES = 430x large
-
-# Match msp430X, msp430xv2 and msp430Xv2 with msp430x.
-MULTILIB_MATCHES = mcpu?msp430x=mcpu?msp430X
-MULTILIB_MATCHES += mcpu?msp430x=mcpu?msp430xv2
-MULTILIB_MATCHES += mcpu?msp430x=mcpu?msp430Xv2
-MULTILIB_MATCHES += mcpu?msp430x=mmcu?msp430x
-MULTILIB_MATCHES += mcpu?msp430x=mmcu?msp430X
-MULTILIB_MATCHES += mcpu?msp430x=mmcu?msp430xv2
-MULTILIB_MATCHES += mcpu?msp430x=mmcu?msp430Xv2
-MULTILIB_MATCHES += mcpu?msp430x=mcpu?430x
-MULTILIB_MATCHES += mcpu?msp430x=mcpu?430X
-MULTILIB_MATCHES += mcpu?msp430x=mcpu?430xv2
-MULTILIB_MATCHES += mcpu?msp430x=mcpu?430Xv2
+MULTILIB_OPTIONS = mcpu=msp430 mlarge
+MULTILIB_DIRNAMES = 430 large
+
+# Match -mcpu=430
+MULTILIB_MATCHES = mcpu?msp430=mcpu?430
+
+# Match the known 430 ISA mcu names.
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430afe221
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430afe222
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430afe223
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430afe231
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430afe232
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430afe233
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430afe251
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430afe252
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430afe253
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430c091
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430c092
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430c111
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430c1111
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430c112
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430c1121
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430c1331
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430c1351
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430c311s
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430c312
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430c313
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430c314
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430c315
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430c323
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430c325
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430c336
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430c337
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430c412
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430c413
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430e112
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430e313
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430e315
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430e325
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430e337
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430f110
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430f1101
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430f1101a
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430f1111
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430f1111a
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430f112
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430f1121
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430f1121a
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430f1122
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430f1132
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430f122
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430f1222
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430f123
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430f1232
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430f133
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430f135
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430f147
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430f1471
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430f148
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430f1481
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430f149
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430f1491
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430f155
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430f156
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430f157
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430f1610
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430f1611
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430f1612
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430f167
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430f168
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430f169
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430f2001
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430f2002
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430f2003
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430f2011
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430f2012
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430f2013
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430f2101
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430f2111
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430f2112
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430f2121
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430f2122
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430f2131
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430f2132
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430f2232
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430f2234
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430f2252
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430f2254
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430f2272
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430f2274
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430f233
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430f2330
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430f235
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430f2350
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430f2370
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430f2410
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430f247
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430f2471
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430f248
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430f2481
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430f249
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430f2491
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430f412
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430f413
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430f4132
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430f415
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430f4152
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430f417
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430f423
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430f423a
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430f425
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430f4250
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430f425a
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430f4260
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430f427
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430f4270
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430f427a
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430f435
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430f4351
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430f436
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430f4361
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430f437
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430f4371
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430f438
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430f439
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430f447
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430f448
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430f4481
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430f449
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430f4491
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430f477
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430f478
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430f4783
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430f4784
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430f479
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430f4793
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430f4794
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430fe423
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430fe4232
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430fe423a
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430fe4242
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430fe425
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430fe4252
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430fe425a
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430fe427
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430fe4272
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430fe427a
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430fg4250
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430fg4260
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430fg4270
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430fg437
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430fg438
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430fg439
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430fg477
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430fg478
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430fg479
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430fw423
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430fw425
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430fw427
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430fw428
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430fw429
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430g2001
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430g2101
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430g2102
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430g2111
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430g2112
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430g2113
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430g2121
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430g2131
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430g2132
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430g2152
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430g2153
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430g2201
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430g2202
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430g2203
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430g2210
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430g2211
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430g2212
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430g2213
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430g2221
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430g2230
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430g2231
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430g2232
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430g2233
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430g2252
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430g2253
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430g2302
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430g2303
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430g2312
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430g2313
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430g2332
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430g2333
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430g2352
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430g2353
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430g2402
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430g2403
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430g2412
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430g2413
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430g2432
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430g2433
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430g2444
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430g2452
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430g2453
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430g2513
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430g2533
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430g2544
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430g2553
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430g2744
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430g2755
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430g2855
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430g2955
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430i2020
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430i2021
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430i2030
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430i2031
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430i2040
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430i2041
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430l092
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430p112
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430p313
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430p315
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430p315s
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430p325
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430p337
+MULTILIB_MATCHES += mcpu?msp430=mmcu?msp430tch5e
# Add additional MCU matches like this:
# MULTILIB_MATCHES += mcpu?msp430x=mmcu?xxxxxxxxxx
-MULTILIB_EXCEPTIONS = mlarge
+MULTILIB_EXCEPTIONS = mcpu=msp430/mlarge
MULTILIB_EXTRA_OPTS =
)
(define_expand "ashlsi3"
- [(parallel [(set (match_operand:SI 0 "nonimmediate_operand")
- (ashift:SI (match_operand:SI 1 "nonimmediate_operand")
- (match_operand:SI 2 "nonmemory_operand")))
+ [(parallel [(set (match_operand:SI 0 "nonimmediate_operand")
+ (ashift:SI (match_operand:SI 1 "nonimmediate_operand")
+ (match_operand:SI 2 "nonmemory_operand")))
(clobber (reg:HI X_REG))])
]
""
)
(define_insn "*addqihi3a_real"
- [(set (match_operand:HI 0 "register_operand" "=r")
- (plus:HI (zero_extend:HI (match_operand:QI 1 "register_operand" "%r"))
- (match_operand:HI 2 "register_operand" "r")))
+ [(set (match_operand:HI 0 "register_operand" "=r")
+ (plus:HI (zero_extend:HI (match_operand:QI 1 "register_operand" "r"))
+ (match_operand:HI 2 "register_operand" "0")))
]
"rl78_real_insns_ok ()"
"add\t%q0, %q1 \;addc\t%Q0, #0"
(define_insn "*cbranchsi4_real_signed"
[(set (pc) (if_then_else
(match_operator 0 "rl78_cmp_operator_signed"
- [(match_operand:SI 1 "nonimmediate_operand" "vU,vU,vU")
- (match_operand:SI 2 "nonmemory_operand" "ISsi,i,v")])
+ [(match_operand:SI 1 "general_operand" "vU,vU,vU,i,i")
+ (match_operand:SI 2 "nonmemory_operand" "ISsi,i,v,S,v")])
(label_ref (match_operand 3 "" ""))
(pc)))
(clobber (reg:HI AX_REG))
"@
movw ax,%H1 \;cmpw ax, %H2 \;xor1 CY,a.7\;not1 CY\; movw ax,%h1 \;sknz \;cmpw ax, %h2 \;sk%C0 \;br\t!!%3
movw ax,%H1 \;cmpw ax, %H2 \;xor1 CY,a.7\; movw ax,%h1 \;sknz \;cmpw ax, %h2 \;sk%C0 \;br\t!!%3
- movw ax,%H1 \;cmpw ax, %H2 \;xor1 CY,a.7\;xor1 CY,%E2.7\;movw ax,%h1 \;sknz \;cmpw ax, %h2 \;sk%C0 \;br\t!!%3"
+ movw ax,%H1 \;cmpw ax, %H2 \;xor1 CY,a.7\;xor1 CY,%E2.7\;movw ax,%h1 \;sknz \;cmpw ax, %h2 \;sk%C0 \;br\t!!%3
+ movw ax, %H1\; cmpw ax, %H2\; xor1 CY, a.7\; not1 CY\; movw ax, %h1 \;sknz\; cmpw ax, %h2 \;sk%0 \;br\t!!%3
+ movw ax, %H1\; cmpw ax, %H2\; xor1 CY, a.7\; movw ax, %h1\; sknz\; cmpw ax, %h2\; sk%0\; br\t!!%3"
)
(define_insn "*cbranchsi4_real"
[(set (reg:QI A_REG) (and:QI (reg:QI A_REG) (match_dup 1)))]
)
+(define_insn "*negandhi3_real"
+ [(set (match_operand:HI 0 "register_operand" "=A")
+ (and:HI (neg:HI (match_operand:HI 1 "register_operand" "0"))
+ (match_operand:HI 2 "immediate_operand" "n")))
+ ]
+ "rl78_real_insns_ok ()"
+ "xor a, #0xff @ xch a, x @ xor a, #0xff @ xch a, x @ addw ax, #1 @ and a, %Q2 @ xch a, x @ and a, %q2 @ xch a, x"
+)
]
"rl78_setup_peep_movhi (operands);"
)
+
+(define_insn "*negandhi3_virt"
+ [(set (match_operand:HI 0 "register_operand" "=v")
+ (and:HI (neg:HI (match_operand:HI 1 "register_operand" "0"))
+ (match_operand:HI 2 "immediate_operand" "n")))
+ ]
+ "rl78_virt_insns_ok ()"
+ "v.nand\t%0, %1, %2"
+)
(define_insn "movdi"
[(set:DI (match_operand:DI 0 "nonimmediate_operand" "=rm")
(match_operand:DI 1 "general_operand" "rmi"))]
- "TARGET_ENABLE_LRA || 1"
+ "TARGET_ENABLE_LRA"
{ return rx_gen_move_template (operands, false); }
[(set_attr "length" "16")
(set_attr "timings" "22")]
(define_insn "movdf"
[(set:DF (match_operand:DF 0 "nonimmediate_operand" "=rm")
(match_operand:DF 1 "general_operand" "rmi"))]
- "TARGET_ENABLE_LRA || 1"
+ "TARGET_ENABLE_LRA"
{ return rx_gen_move_template (operands, false); }
[(set_attr "length" "16")
(set_attr "timings" "22")]
@code{msp430.h} header file to select an MCU specific supplimentary
header file.
-In addition two scripts will be added to the linker command line:
-@code{memory.ld} and @code{peripherals.ld}, with a search path based
-upon the MCU name.
+The option also sets the ISA to use. If the MCU name is one that is
+known to only support the 430 ISA then that is selected, otherwise the
+430X ISA is selected. A generic MCU name of @code{msp430} can also be
+used to select the 430 ISA. Similarly the generic @code{msp430x} MCU
+name will select the 430X ISA.
+
+In addition an MCU specific linker script will be added to the linker
+command line. The script's name is the name of the MCU with
+@code{.ld} appended. Thus specifying @option{-mmcu=xxx} on the gcc
+command line will define the C preprocessor symbol @code{__XXX__} and
+cause the linker to search for a script called @file{xxx.ld}.
This option is also passed on to the assembler.
@item -mcpu=
@opindex -mcpu=
-Specific the ISA to use. Accepted values are @code{msp430},
-@code{msp430x} and @code{msp430xv2}. This option is needed in order
-to ensure that the correct instructions are generated and that the
-correct libraries are linked in.
+Specifies the ISA to use. Accepted values are @code{msp430},
+@code{msp430x} and @code{msp430xv2}. This option is deprecated. The
+@option{-mmcu=} option should be used to select the ISA.
@item -msim
@opindex msim
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