mips: Change the integer and fp register widths to be 64 bits.
authorGabe Black <gabeblack@google.com>
Sat, 13 Oct 2018 06:10:01 +0000 (23:10 -0700)
committerGabe Black <gabeblack@google.com>
Tue, 6 Nov 2018 01:06:28 +0000 (01:06 +0000)
This makes them more consistent with the other architectures, helping
to facilitate having a single, unified type across ISAs in the future.

Change-Id: I65efb10e39d453281b8429eeedbb46fa6b023a2b
Reviewed-on: https://gem5-review.googlesource.com/c/13620
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Jason Lowe-Power <jason@lowepower.com>

src/arch/mips/registers.hh

index 55c2dee034e441e7c035f7a24caad87a916dc14d..dbac83995a4051c52e2e0e389a2e82915a9b49ff 100644 (file)
@@ -278,11 +278,11 @@ const int NumMiscRegs = MISCREG_NUMREGS;
 
 const int TotalNumRegs = NumIntRegs + NumFloatRegs + NumMiscRegs;
 
-typedef uint32_t IntReg;
+typedef uint64_t IntReg;
 
 // floating point register file entry type
-typedef uint32_t FloatRegBits;
-typedef float FloatReg;
+typedef uint64_t FloatRegBits;
+typedef double FloatReg;
 
 // cop-0/cop-1 system control register
 typedef uint64_t MiscReg;