whoops ls010 not ls009. add paragraph about exceptional behaviour changes

diff --git a/openpower/sv/rfc/ls010.mdwn b/openpower/sv/rfc/ls010.mdwn
index 15bf1fa8bcd4ed9f3520f927323dd110104ac176..ba99bd601e0fbe0ea6dce461914125e1042c5250 100644 (file)
--- a/openpower/sv/rfc/ls010.mdwn
+++ b/openpower/sv/rfc/ls010.mdwn
@@ -1,4 +1,4 @@
-# RFC ls009 SVP64 Zero-Overhead Loop Prefix Subsystem
+# RFC ls010 SVP64 Zero-Overhead Loop Prefix Subsystem
 
 Credits and acknowledgements:
 
@@ -53,6 +53,15 @@ sustain 100% throughput*
 |--------|--------------|--------------|
 | EXT09  | v3.1  Prefix | v3.0/1  Suffix |
 
+Two apparent exceptions to the above hard rule exist: SV Branch-Conditional
+operations and LD/ST-update "Post-Increment" Mode.  Post-Increment
+was considered sufficiently high priority (significantly reducing hot-loop
+instruction count) that one bit in the Prefix is reserved for it.
+Vectorised Branch-Conditional operations "embed" the original Scalar
+Branch-Conditional behaviour into a much more advanced variant that
+is highly suited to High-Performance Computation (HPC), Supercomputing,
+and parallel GPU Workloads.
+
 Subset implementations in hardware are permitted, as long as certain
 rules are followed, allowing for full soft-emulation including future
 revisions.  Compliancy Subsets exist to ensure minimum levels of binary