Aarch64: Move pseudo defines to header
authorAlan Hayward <alan.hayward@arm.com>
Fri, 24 Aug 2018 08:53:09 +0000 (09:53 +0100)
committerAlan Hayward <alan.hayward@arm.com>
Mon, 1 Oct 2018 13:00:14 +0000 (14:00 +0100)
gdb/
* aarch64-tdep.c (AARCH64_Q0_REGNUM): Move to here.
(AARCH64_D0_REGNUM): Likewise.
(AARCH64_S0_REGNUM): Likewise.
(AARCH64_H0_REGNUM): Likewise.
(AARCH64_B0_REGNUM): Likewise.
(AARCH64_SVE_V0_REGNUM): Likewise.
* arch/aarch64.h (AARCH64_Q0_REGNUM): Move from here.
(AARCH64_D0_REGNUM): Likewise.
(AARCH64_S0_REGNUM): Likewise.
(AARCH64_H0_REGNUM): Likewise.
(AARCH64_B0_REGNUM): Likewise.
(AARCH64_SVE_V0_REGNUM): Likewise.

gdb/ChangeLog
gdb/aarch64-tdep.c
gdb/arch/aarch64.h

index 12a04eec542c881c58707d8e96a0a02b1228be8a..2eec2e3828e07a1b175e3d96b4fac35bcb59c3dd 100644 (file)
@@ -1,3 +1,18 @@
+2018-10-01  Alan Hayward  <alan.hayward@arm.com>
+
+       * aarch64-tdep.c (AARCH64_Q0_REGNUM): Move to here.
+       (AARCH64_D0_REGNUM): Likewise.
+       (AARCH64_S0_REGNUM): Likewise.
+       (AARCH64_H0_REGNUM): Likewise.
+       (AARCH64_B0_REGNUM): Likewise.
+       (AARCH64_SVE_V0_REGNUM): Likewise.
+       * arch/aarch64.h (AARCH64_Q0_REGNUM): Move from here.
+       (AARCH64_D0_REGNUM): Likewise.
+       (AARCH64_S0_REGNUM): Likewise.
+       (AARCH64_H0_REGNUM): Likewise.
+       (AARCH64_B0_REGNUM): Likewise.
+       (AARCH64_SVE_V0_REGNUM): Likewise.
+
 2018-10-01  Gary Benson <gbenson@redhat.com>
 
        * gdb_proc_service.h (gdb_prfpregset_t): Remove typedef.
index 90b6deb0eade924ec1297d72f1b454df7c5957bb..023e8eb45393e48d0407bf149f34333769664756 100644 (file)
 #define bit(obj,st) (((obj) >> (st)) & 1)
 #define bits(obj,st,fn) (((obj) >> (st)) & submask ((fn) - (st)))
 
-/* Pseudo register base numbers.  */
-#define AARCH64_Q0_REGNUM 0
-#define AARCH64_D0_REGNUM (AARCH64_Q0_REGNUM + AARCH64_D_REGISTER_COUNT)
-#define AARCH64_S0_REGNUM (AARCH64_D0_REGNUM + 32)
-#define AARCH64_H0_REGNUM (AARCH64_S0_REGNUM + 32)
-#define AARCH64_B0_REGNUM (AARCH64_H0_REGNUM + 32)
-#define AARCH64_SVE_V0_REGNUM (AARCH64_B0_REGNUM + 32)
-
 /* A Homogeneous Floating-Point or Short-Vector Aggregate may have at most
    four members.  */
 #define HA_MAX_NUM_FLDS                4
index d6b88e6d5659bf8e223652f9ef952813a6ace677..ff9186007bf5778208aaa1e8e8d9211fd4cb3798 100644 (file)
@@ -57,6 +57,14 @@ enum aarch64_regnum
   AARCH64_LAST_V_ARG_REGNUM = AARCH64_V0_REGNUM + 7
 };
 
+/* Pseudo register base numbers.  */
+#define AARCH64_Q0_REGNUM 0
+#define AARCH64_D0_REGNUM (AARCH64_Q0_REGNUM + AARCH64_D_REGISTER_COUNT)
+#define AARCH64_S0_REGNUM (AARCH64_D0_REGNUM + 32)
+#define AARCH64_H0_REGNUM (AARCH64_S0_REGNUM + 32)
+#define AARCH64_B0_REGNUM (AARCH64_H0_REGNUM + 32)
+#define AARCH64_SVE_V0_REGNUM (AARCH64_B0_REGNUM + 32)
+
 #define AARCH64_X_REGS_NUM 31
 #define AARCH64_V_REGS_NUM 32
 #define AARCH64_SVE_Z_REGS_NUM AARCH64_V_REGS_NUM