+2018-10-01 Alan Hayward <alan.hayward@arm.com>
+
+ * aarch64-tdep.c (AARCH64_Q0_REGNUM): Move to here.
+ (AARCH64_D0_REGNUM): Likewise.
+ (AARCH64_S0_REGNUM): Likewise.
+ (AARCH64_H0_REGNUM): Likewise.
+ (AARCH64_B0_REGNUM): Likewise.
+ (AARCH64_SVE_V0_REGNUM): Likewise.
+ * arch/aarch64.h (AARCH64_Q0_REGNUM): Move from here.
+ (AARCH64_D0_REGNUM): Likewise.
+ (AARCH64_S0_REGNUM): Likewise.
+ (AARCH64_H0_REGNUM): Likewise.
+ (AARCH64_B0_REGNUM): Likewise.
+ (AARCH64_SVE_V0_REGNUM): Likewise.
+
2018-10-01 Gary Benson <gbenson@redhat.com>
* gdb_proc_service.h (gdb_prfpregset_t): Remove typedef.
#define bit(obj,st) (((obj) >> (st)) & 1)
#define bits(obj,st,fn) (((obj) >> (st)) & submask ((fn) - (st)))
-/* Pseudo register base numbers. */
-#define AARCH64_Q0_REGNUM 0
-#define AARCH64_D0_REGNUM (AARCH64_Q0_REGNUM + AARCH64_D_REGISTER_COUNT)
-#define AARCH64_S0_REGNUM (AARCH64_D0_REGNUM + 32)
-#define AARCH64_H0_REGNUM (AARCH64_S0_REGNUM + 32)
-#define AARCH64_B0_REGNUM (AARCH64_H0_REGNUM + 32)
-#define AARCH64_SVE_V0_REGNUM (AARCH64_B0_REGNUM + 32)
-
/* A Homogeneous Floating-Point or Short-Vector Aggregate may have at most
four members. */
#define HA_MAX_NUM_FLDS 4
AARCH64_LAST_V_ARG_REGNUM = AARCH64_V0_REGNUM + 7
};
+/* Pseudo register base numbers. */
+#define AARCH64_Q0_REGNUM 0
+#define AARCH64_D0_REGNUM (AARCH64_Q0_REGNUM + AARCH64_D_REGISTER_COUNT)
+#define AARCH64_S0_REGNUM (AARCH64_D0_REGNUM + 32)
+#define AARCH64_H0_REGNUM (AARCH64_S0_REGNUM + 32)
+#define AARCH64_B0_REGNUM (AARCH64_H0_REGNUM + 32)
+#define AARCH64_SVE_V0_REGNUM (AARCH64_B0_REGNUM + 32)
+
#define AARCH64_X_REGS_NUM 31
#define AARCH64_V_REGS_NUM 32
#define AARCH64_SVE_Z_REGS_NUM AARCH64_V_REGS_NUM