add RVV exceptions links
authorLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Wed, 18 Apr 2018 04:59:54 +0000 (05:59 +0100)
committerLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Wed, 18 Apr 2018 05:00:01 +0000 (06:00 +0100)
simple_v_extension.mdwn

index 6599f930bf7f6aa597e8405b61cc967fecb381b7..b94018202ef2083ad7008b20aff97fe6ddb3f635 100644 (file)
@@ -1341,4 +1341,7 @@ by *introducing* deliberate latency into the execution phase.
 * Fast context save/restore proposal <https://groups.google.com/a/groups.riscv.org/d/msgid/isa-dev/57F823FA.6030701%40gmail.com>
 * Register File Bank Cacheing <https://www.princeton.edu/~rblee/ELE572Papers/MultiBankRegFile_ISCA2000.pdf>
 * Expired Patent on Vector Virtual Memory solutions
-  <https://patentimages.storage.googleapis.com/fc/f6/e2/2cbee92fcd8743/US5895501.pdf?
+  <https://patentimages.storage.googleapis.com/fc/f6/e2/2cbee92fcd8743/US5895501.pdf>
+* Discussion on RVV "re-entrant" capabilities allowing operations to be
+  restarted if an exception occurs (VM page-table miss)
+  <https://groups.google.com/a/groups.riscv.org/d/msg/isa-dev/IuNFitTw9fM/CCKBUlzsAAAJ>