(no commit message)

diff --git a/nlnet_2023_simplev_riscv.mdwn b/nlnet_2023_simplev_riscv.mdwn
index f0f60e36a2c5c31afaf491a5f3d1f5a876960587..3a49b10eaf4b6101ff2b0aebb66943b4dc55141b 100644 (file)
--- a/nlnet_2023_simplev_riscv.mdwn
+++ b/nlnet_2023_simplev_riscv.mdwn
@@ -74,7 +74,6 @@ Key phases of this project are:
 * Documentation, demonstrations and Conference Papers. This will include porting 
   results of other completed projects (cryptoprimitives, video) from POWER ISA to 
   the RISC-V/Simple-V environment
-
 * Research and assessment of ARM7 and i486 (both on opencores.org) as well as ARC
   as to their feasibility for applying Simple-V Prefixing in future development projects