#define is_spfp_p(op) (((sc) == SPX))
#define is_dpfp_p(op) (((sc) == DPX))
#define is_fpuda_p(op) (((sc) == DPA))
-#define is_br_jmp_insn_p(op) (((op)->class == BRANCH || (op)->class == JUMP))
-#define is_kernel_insn_p(op) (((op)->class == KERNEL))
+#define is_br_jmp_insn_p(op) (((op)->insn_class == BRANCH || (op)->insn_class == JUMP))
+#define is_kernel_insn_p(op) (((op)->insn_class == KERNEL))
/* Generic assembler global variables which must be defined by all
targets. */
{
const char *name;
int len;
- int class;
+ int attr_class;
} attributes_t;
static const attributes_t suffixclass[] =
const char *p;
const struct arc_aux_reg *auxr;
- if (opcode->class != AUXREG)
+ if (opcode->insn_class != AUXREG)
goto de_fault;
p = S_GET_NAME (tok[tokidx].X_add_symbol);
/* Check for extension conditional codes. */
if (ext_condcode.arc_ext_condcode
- && cl_flags->class & F_CLASS_EXTEND)
+ && cl_flags->flag_class & F_CLASS_EXTEND)
{
struct arc_flag_operand *pf = ext_condcode.arc_ext_condcode;
while (pf->name)
}
}
- if ((cl_flags->class & F_CLASS_REQUIRED) && cl_matches == 0)
+ if ((cl_flags->flag_class & F_CLASS_REQUIRED) && cl_matches == 0)
goto match_failed;
- if ((cl_flags->class & F_CLASS_OPTIONAL) && cl_matches > 1)
+ if ((cl_flags->flag_class & F_CLASS_OPTIONAL) && cl_matches > 1)
goto match_failed;
}
/* Did I check all the parsed flags? */
switch (t->X_md)
{
case O_plt:
- if (opcode->class == JUMP)
+ if (opcode->insn_class == JUMP)
as_bad_where (frag_now->fr_file, frag_now->fr_line,
_("Unable to use @plt relocatio for insn %s"),
opcode->name);
break;
case O_pcl:
reloc = ARC_RELOC_TABLE (t->X_md)->reloc;
- if (ARC_SHORT (opcode->mask) || opcode->class == JUMP)
+ if (ARC_SHORT (opcode->mask) || opcode->insn_class == JUMP)
as_bad_where (frag_now->fr_file, frag_now->fr_line,
_("Unable to use @pcl relocation for insn %s"),
opcode->name);
if (!strncmp (suffixclass[i].name, input_line_pointer,
suffixclass[i].len))
{
- suffix_class |= suffixclass[i].class;
+ suffix_class |= suffixclass[i].attr_class;
input_line_pointer += suffixclass[i].len;
break;
}
input_line_pointer,
syntaxclassmod[i].len))
{
- syntax_class_modifiers |= syntaxclassmod[i].class;
+ syntax_class_modifiers |= syntaxclassmod[i].attr_class;
input_line_pointer += syntaxclassmod[i].len;
break;
}
input_line_pointer,
syntaxclass[i].len))
{
- syntax_class |= syntaxclass[i].class;
+ syntax_class |= syntaxclass[i].attr_class;
input_line_pointer += syntaxclass[i].len;
break;
}
unsigned int value;
/* Check first the extensions. */
- if (cl_flags->class & F_CLASS_EXTEND)
+ if (cl_flags->flag_class & F_CLASS_EXTEND)
{
value = (insn[0] & 0x1F);
if (arcExtMap_condCodeName (value))
const unsigned *flgopridx;
/* Check first the extensions. */
- if (cl_flags->class & F_CLASS_EXTEND)
+ if (cl_flags->flag_class & F_CLASS_EXTEND)
{
const char *name;
value = (insn[0] & 0x1F);
unsigned int i;
const struct arc_aux_reg *auxr = &arc_aux_regs[0];
- if (opcode->class != AUXREG)
+ if (opcode->insn_class != AUXREG)
return NULL;
name = arcExtMap_auxRegName (value);
(*info->fprintf_func) (info->stream, "%s", opcode->name);
/* Preselect the insn class. */
- switch (opcode->class)
+ switch (opcode->insn_class)
{
case BRANCH:
case JUMP: