return npc;
}
-void processor_t::update_slow_path()
+bool processor_t::slow_path()
{
- slow_path = debug || state.single_step != state.STEP_NONE || state.dcsr.cause;
- if (slow_path)
- return;
+ return debug || state.single_step != state.STEP_NONE || state.dcsr.cause;
}
// fetch/decode/execute loop
{
take_interrupt();
- if (unlikely(slow_path))
+ if (unlikely(slow_path()))
{
while (instret < n)
{
set_privilege(PRV_M);
state.dpc = state.pc;
state.pc = DEBUG_ROM_START;
- //debug = true; // TODO
- update_slow_path();
}
void processor_t::take_trap(trap_t& t, reg_t epc)
// When true, display disassembly of each instruction that's executed.
bool debug;
- void update_slow_path();
+ // When true, take the slow simulation path.
+ bool slow_path();
// Return the index of a trigger that matched, or -1.
inline int trigger_match(trigger_operation_t operation, reg_t address, reg_t data)
std::string isa_string;
bool histogram_enabled;
bool halt_on_reset;
- // When true, take the slow simulation path.
- bool slow_path;
std::vector<insn_desc_t> instructions;
std::map<reg_t,uint64_t> pc_histogram;