(no commit message)

diff --git a/openpower/sv/rfc/ls012.mdwn b/openpower/sv/rfc/ls012.mdwn
index 395863cf286e5046e4b5c143398cc906c4c73da5..cae948fb428f00ed38d4f260297b8cda15fa6d1a 100644 (file)
--- a/openpower/sv/rfc/ls012.mdwn
+++ b/openpower/sv/rfc/ls012.mdwn
@@ -82,6 +82,20 @@ where IEEE754 full bit-accuracy is paramount.  In 3D GPU scenarios for example
 even 12-bit accuracy can be overkill, but for HPC Scientific scenarios 12-bit
 would be disastrous.
 
+There are a **lot** of operations here, and they also bring Power ISA
+up-to-date to IEEE754-2019.  Fortunately the number of critical instructions
+is quite low, but the caveat is that if those operations are utilised to
+synthesise other IEEE754 operations (divide by `pi` for example) full bitlevel
+accuracy (a hard requirement for IEEE754) is lost.
+
+Also worth noting that the Khronos Group defines minimum acceptable bit-accuracy
+levels for 3D Graphics: these are **nowhere near* the full accuracy demanded
+by IEEE754, the reason for the Khronos definitions is a massive reduction often
+four-fold in power consumption and gate count when 3D Graphics simply has no need
+for full accuracy.
+
+*For 3D GPU markets this definitely needs addressing*
+
 ## Audio/Video
 
 Found at [[sv/av_opcodes]] these do not require Saturated variants because Saturation