radeon/uvd: fix calc_ctx_size_h265_main10

Left shift was applied twice.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=110702

Reviewed-by: Leo Liu <leo.liu@amd.com>
Tested-by: <irherder@gmail.com>
Signed-off-by: Marek Olšák <marek.olsak@amd.com>
Cc: <mesa-stable@lists.freedesktop.org>

diff --git a/src/gallium/drivers/r600/radeon_uvd.c b/src/gallium/drivers/r600/radeon_uvd.c
index 7f853446b142bcfe382d66f463dbd5292e5ea80a..2a5054f1aef521ef744986fc480cb120b0780564 100644 (file)
--- a/src/gallium/drivers/r600/radeon_uvd.c
+++ b/src/gallium/drivers/r600/radeon_uvd.c
@@ -247,7 +247,7 @@ static unsigned calc_ctx_size_h265_main(struct ruvd_decoder *dec)
 
 static unsigned calc_ctx_size_h265_main10(struct ruvd_decoder *dec, struct pipe_h265_picture_desc *pic)
 {
-       unsigned block_size, log2_ctb_size, width_in_ctb, height_in_ctb, num_16x16_block_per_ctb;
+       unsigned log2_ctb_size, width_in_ctb, height_in_ctb, num_16x16_block_per_ctb;
        unsigned context_buffer_size_per_ctb_row, cm_buffer_size, max_mb_address, db_left_tile_pxl_size;
        unsigned db_left_tile_ctx_size = 4096 / 16 * (32 + 16 * 4);
 
@@ -262,8 +262,8 @@ static unsigned calc_ctx_size_h265_main10(struct ruvd_decoder *dec, struct pipe_
        else
                max_references = MAX2(max_references, 17);
 
-       block_size = (1 << (pic->pps->sps->log2_min_luma_coding_block_size_minus3 + 3));
-       log2_ctb_size = block_size + pic->pps->sps->log2_diff_max_min_luma_coding_block_size;
+       log2_ctb_size = pic->pps->sps->log2_min_luma_coding_block_size_minus3 + 3 +
+               pic->pps->sps->log2_diff_max_min_luma_coding_block_size;
 
        width_in_ctb = (width + ((1 << log2_ctb_size) - 1)) >> log2_ctb_size;
        height_in_ctb = (height + ((1 << log2_ctb_size) - 1)) >> log2_ctb_size;

diff --git a/src/gallium/drivers/radeon/radeon_uvd.c b/src/gallium/drivers/radeon/radeon_uvd.c
index 6c03c123293288232478df204a1b15c7eb5d4718..59ff5a88d539f05c979a2df7d3479bb27b4c1491 100644 (file)
--- a/src/gallium/drivers/radeon/radeon_uvd.c
+++ b/src/gallium/drivers/radeon/radeon_uvd.c
@@ -298,7 +298,7 @@ static unsigned calc_ctx_size_h265_main(struct ruvd_decoder *dec)
 
 static unsigned calc_ctx_size_h265_main10(struct ruvd_decoder *dec, struct pipe_h265_picture_desc *pic)
 {
-       unsigned block_size, log2_ctb_size, width_in_ctb, height_in_ctb, num_16x16_block_per_ctb;
+       unsigned log2_ctb_size, width_in_ctb, height_in_ctb, num_16x16_block_per_ctb;
        unsigned context_buffer_size_per_ctb_row, cm_buffer_size, max_mb_address, db_left_tile_pxl_size;
        unsigned db_left_tile_ctx_size = 4096 / 16 * (32 + 16 * 4);
 
@@ -313,8 +313,8 @@ static unsigned calc_ctx_size_h265_main10(struct ruvd_decoder *dec, struct pipe_
        else
                max_references = MAX2(max_references, 17);
 
-       block_size = (1 << (pic->pps->sps->log2_min_luma_coding_block_size_minus3 + 3));
-       log2_ctb_size = block_size + pic->pps->sps->log2_diff_max_min_luma_coding_block_size;
+       log2_ctb_size = pic->pps->sps->log2_min_luma_coding_block_size_minus3 + 3 +
+               pic->pps->sps->log2_diff_max_min_luma_coding_block_size;
 
        width_in_ctb = (width + ((1 << log2_ctb_size) - 1)) >> log2_ctb_size;
        height_in_ctb = (height + ((1 << log2_ctb_size) - 1)) >> log2_ctb_size;

diff --git a/src/gallium/drivers/radeon/radeon_vcn_dec.c b/src/gallium/drivers/radeon/radeon_vcn_dec.c
index 688cef90103ac21983420ff6ab790cc7a12e6fa9..b1d6edba4665d479b0f5104fd4dd8adf67414920 100644 (file)
--- a/src/gallium/drivers/radeon/radeon_vcn_dec.c
+++ b/src/gallium/drivers/radeon/radeon_vcn_dec.c
@@ -552,7 +552,7 @@ static unsigned calc_ctx_size_h265_main(struct radeon_decoder *dec)
 
 static unsigned calc_ctx_size_h265_main10(struct radeon_decoder *dec, struct pipe_h265_picture_desc *pic)
 {
-       unsigned block_size, log2_ctb_size, width_in_ctb, height_in_ctb, num_16x16_block_per_ctb;
+       unsigned log2_ctb_size, width_in_ctb, height_in_ctb, num_16x16_block_per_ctb;
        unsigned context_buffer_size_per_ctb_row, cm_buffer_size, max_mb_address, db_left_tile_pxl_size;
        unsigned db_left_tile_ctx_size = 4096 / 16 * (32 + 16 * 4);
 
@@ -568,8 +568,8 @@ static unsigned calc_ctx_size_h265_main10(struct radeon_decoder *dec, struct pip
        else
                max_references = MAX2(max_references, 17);
 
-       block_size = (1 << (pic->pps->sps->log2_min_luma_coding_block_size_minus3 + 3));
-       log2_ctb_size = block_size + pic->pps->sps->log2_diff_max_min_luma_coding_block_size;
+       log2_ctb_size = pic->pps->sps->log2_min_luma_coding_block_size_minus3 + 3 +
+               pic->pps->sps->log2_diff_max_min_luma_coding_block_size;
 
        width_in_ctb = (width + ((1 << log2_ctb_size) - 1)) >> log2_ctb_size;
        height_in_ctb = (height + ((1 << log2_ctb_size) - 1)) >> log2_ctb_size;