[libre-riscv-dev] [Bug 296] idea: cyclic buffer between FUs and register file
authorbugzilla-daemon <bugzilla-daemon@libre-soc.org>
Sat, 2 May 2020 13:15:16 +0000 (13:15 +0000)
committerlibre-riscv-dev <libre-riscv-dev@lists.libre-riscv.org>
Sat, 2 May 2020 13:15:18 +0000 (14:15 +0100)
b3/0b9e7e7026447a7664658ceb96f77ec900e38c [new file with mode: 0644]

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+Date: Sat, 02 May 2020 13:15:16 +0000
+X-Bugzilla-Reason: CC
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+X-Bugzilla-Product: Libre-SOC's first SoC
+X-Bugzilla-Component: Source Code
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+X-Bugzilla-Severity: enhancement
+X-Bugzilla-Who: lkcl@lkcl.net
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+Message-ID: <bug-296-13-KVvWJnd0TB@https.bugs.libre-soc.org/>
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+Auto-Submitted: auto-generated
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+Subject: [libre-riscv-dev] [Bug 296] idea: cyclic buffer between FUs and
+ register file
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