Use aarch64_decode_insn in aarch64_displaced_step_copy_insn
authorYao Qi <yao.qi@linaro.org>
Thu, 5 Nov 2015 09:44:32 +0000 (09:44 +0000)
committerYao Qi <yao.qi@linaro.org>
Thu, 5 Nov 2015 09:44:32 +0000 (09:44 +0000)
gdb:

2015-11-05  Yao Qi  <yao.qi@linaro.org>

* aarch64-tdep.c (aarch64_displaced_step_copy_insn): Call
aarch64_decode_insn and decode instruction by aarch64_inst.

gdb/ChangeLog
gdb/aarch64-tdep.c

index 93a2950caf85a13b132382f2b024480c1ffddbd5..366ee4c4a7f1f193dddeff734967624f3676b4ae 100644 (file)
@@ -1,3 +1,8 @@
+2015-11-05  Yao Qi  <yao.qi@linaro.org>
+
+       * aarch64-tdep.c (aarch64_displaced_step_copy_insn): Call
+       aarch64_decode_insn and decode instruction by aarch64_inst.
+
 2015-11-05  Yao Qi  <yao.qi@linaro.org>
 
        * aarch64-tdep.c (extract_signed_bitfield): Remove.
index 4bdd22753db75fb3c784659daf07c476dc75ce9a..bc282e97bf0ec7784d24d8f541c28977d93a8356 100644 (file)
@@ -2500,9 +2500,13 @@ aarch64_displaced_step_copy_insn (struct gdbarch *gdbarch,
   enum bfd_endian byte_order_for_code = gdbarch_byte_order_for_code (gdbarch);
   uint32_t insn = read_memory_unsigned_integer (from, 4, byte_order_for_code);
   struct aarch64_displaced_step_data dsd;
+  aarch64_inst inst;
+
+  if (aarch64_decode_insn (insn, &inst, 1) != 0)
+    return NULL;
 
   /* Look for a Load Exclusive instruction which begins the sequence.  */
-  if (decode_masked_match (insn, 0x3fc00000, 0x08400000))
+  if (inst.opcode->iclass == ldstexcl && bit (insn, 22))
     {
       /* We can't displaced step atomic sequences.  */
       return NULL;