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AVX-512. Add vperm[it]2 insns support.
authorAlexander Ivchenko <alexander.ivchenko@intel.com>
Thu, 11 Sep 2014 06:52:30 +0000 (06:52 +0000)
committerKirill Yukhin <kyukhin@gcc.gnu.org>
Thu, 11 Sep 2014 06:52:30 +0000 (06:52 +0000)
gcc/
* config/i386/sse.md
(define_expand "<avx512>_vpermi2var<VI48F:mode>3_maskz"): Rename from
"avx512f_vpermi2var<mode>3_maskz" and update mode iterator.
(define_expand "<avx512>_vpermi2var<VI2_AVX512VL:mode>3_maskz"):
New.
(define_insn "<avx512>_vpermi2var<VI48F:mode>3<sd_maskz_name>"): Rename
from "avx512f_vpermi2var<mode>3<sd_maskz_name>" and update mode
iterator.
(define_insn "<avx512>_vpermi2var<VI2_AVX512VL:mode>3<sd_maskz_name>"):
New.
(define_insn "<avx512>_vpermi2var<VI48F:mode>3_mask"): Rename from
"avx512f_vpermi2var<mode>3_mask" and update mode iterator.
(define_insn "<avx512>_vpermi2var<VI2_AVX512VL:mode>3_mask"): New.
(define_expand "<avx512>_vpermt2var<VI48F:mode>3_maskz"): Rename from
"avx512f_vpermt2var<mode>3_maskz" and update mode iterator.
(define_expand "<avx512>_vpermt2var<VI2_AVX512VL:mode>3_maskz"): New.
(define_insn "<avx512>_vpermt2var<VI48F:mode>3<sd_maskz_name>"): Rename
from "avx512f_vpermt2var<mode>3<sd_maskz_name>" and update mode
iterator.
(define_insn "<avx512>_vpermt2var<VI2_AVX512VL:mode>3<sd_maskz_name>"):
New.
(define_insn "<avx512>_vpermt2var<VI48F:mode>3_mask"): Rename from
"avx512f_vpermt2var<mode>3_mask" and update mode iterator.
(define_insn "<avx512>_vpermt2var<VI2_AVX512VL:mode>3_mask"): New.

Co-Authored-By: Andrey Turetskiy <andrey.turetskiy@intel.com>
Co-Authored-By: Anna Tikhonova <anna.tikhonova@intel.com>
Co-Authored-By: Ilya Tocar <ilya.tocar@intel.com>
Co-Authored-By: Ilya Verbin <ilya.verbin@intel.com>
Co-Authored-By: Kirill Yukhin <kirill.yukhin@intel.com>
Co-Authored-By: Maxim Kuznetsov <maxim.kuznetsov@intel.com>
Co-Authored-By: Michael Zolotukhin <michael.v.zolotukhin@intel.com>
From-SVN: r215151

gcc/ChangeLog patch | blob | history
gcc/config/i386/sse.md patch | blob | history

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 40f912ab9d2910b908ac806d3f0c827e5e394867..747dbfcb28abcb06ba165569dfaa7346eb93de5c 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,37 @@
+2014-09-11  Alexander Ivchenko  <alexander.ivchenko@intel.com>
+           Maxim Kuznetsov  <maxim.kuznetsov@intel.com>
+           Anna Tikhonova  <anna.tikhonova@intel.com>
+           Ilya Tocar  <ilya.tocar@intel.com>
+           Andrey Turetskiy  <andrey.turetskiy@intel.com>
+           Ilya Verbin  <ilya.verbin@intel.com>
+           Kirill Yukhin  <kirill.yukhin@intel.com>
+           Michael Zolotukhin  <michael.v.zolotukhin@intel.com>
+
+       * config/i386/sse.md
+       (define_expand "<avx512>_vpermi2var<VI48F:mode>3_maskz"): Rename from
+       "avx512f_vpermi2var<mode>3_maskz" and update mode iterator.
+       (define_expand "<avx512>_vpermi2var<VI2_AVX512VL:mode>3_maskz"):
+       New.
+       (define_insn "<avx512>_vpermi2var<VI48F:mode>3<sd_maskz_name>"): Rename
+       from "avx512f_vpermi2var<mode>3<sd_maskz_name>" and update mode
+       iterator.
+       (define_insn "<avx512>_vpermi2var<VI2_AVX512VL:mode>3<sd_maskz_name>"):
+       New.
+       (define_insn "<avx512>_vpermi2var<VI48F:mode>3_mask"): Rename from
+       "avx512f_vpermi2var<mode>3_mask" and update mode iterator.
+       (define_insn "<avx512>_vpermi2var<VI2_AVX512VL:mode>3_mask"): New.
+       (define_expand "<avx512>_vpermt2var<VI48F:mode>3_maskz"): Rename from
+       "avx512f_vpermt2var<mode>3_maskz" and update mode iterator.
+       (define_expand "<avx512>_vpermt2var<VI2_AVX512VL:mode>3_maskz"): New.
+       (define_insn "<avx512>_vpermt2var<VI48F:mode>3<sd_maskz_name>"): Rename
+       from "avx512f_vpermt2var<mode>3<sd_maskz_name>" and update mode
+       iterator.
+       (define_insn "<avx512>_vpermt2var<VI2_AVX512VL:mode>3<sd_maskz_name>"):
+       New.
+       (define_insn "<avx512>_vpermt2var<VI48F:mode>3_mask"): Rename from
+       "avx512f_vpermt2var<mode>3_mask" and update mode iterator.
+       (define_insn "<avx512>_vpermt2var<VI2_AVX512VL:mode>3_mask"): New.
+
 2014-09-10  Jan Hubicka  <hubicka@ucw.cz>
 
        * varpool.c (varpool_node::ctor_useable_for_folding_p): Do not try
diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md
index 91ec8fdfa5493ac31329c54089cbc73b367f931c..e182582bc845a4759de5c1985c64b0cbdb1ddcf0 100644 (file)
--- a/gcc/config/i386/sse.md
+++ b/gcc/config/i386/sse.md
@@ -15662,26 +15662,40 @@
    (set_attr "prefix" "<mask_prefix>")
    (set_attr "mode" "<sseinsnmode>")])
 
-(define_expand "avx512f_vpermi2var<mode>3_maskz"
-  [(match_operand:VI48F_512 0 "register_operand" "=v")
-   (match_operand:VI48F_512 1 "register_operand" "v")
+(define_expand "<avx512>_vpermi2var<mode>3_maskz"
+  [(match_operand:VI48F 0 "register_operand" "=v")
+   (match_operand:VI48F 1 "register_operand" "v")
    (match_operand:<sseintvecmode> 2 "register_operand" "0")
-   (match_operand:VI48F_512 3 "nonimmediate_operand" "vm")
+   (match_operand:VI48F 3 "nonimmediate_operand" "vm")
    (match_operand:<avx512fmaskmode> 4 "register_operand" "Yk")]
   "TARGET_AVX512F"
 {
-  emit_insn (gen_avx512f_vpermi2var<mode>3_maskz_1 (
+  emit_insn (gen_<avx512>_vpermi2var<mode>3_maskz_1 (
        operands[0], operands[1], operands[2], operands[3],
        CONST0_RTX (<MODE>mode), operands[4]));
   DONE;
 })
 
-(define_insn "avx512f_vpermi2var<mode>3<sd_maskz_name>"
-  [(set (match_operand:VI48F_512 0 "register_operand" "=v")
-       (unspec:VI48F_512
-         [(match_operand:VI48F_512 1 "register_operand" "v")
+(define_expand "<avx512>_vpermi2var<mode>3_maskz"
+  [(match_operand:VI2_AVX512VL 0 "register_operand" "=v")
+   (match_operand:VI2_AVX512VL 1 "register_operand" "v")
+   (match_operand:<sseintvecmode> 2 "register_operand" "0")
+   (match_operand:VI2_AVX512VL 3 "nonimmediate_operand" "vm")
+   (match_operand:<avx512fmaskmode> 4 "register_operand" "Yk")]
+  "TARGET_AVX512BW"
+{
+  emit_insn (gen_<avx512>_vpermi2var<mode>3_maskz_1 (
+       operands[0], operands[1], operands[2], operands[3],
+       CONST0_RTX (<MODE>mode), operands[4]));
+  DONE;
+})
+
+(define_insn "<avx512>_vpermi2var<mode>3<sd_maskz_name>"
+  [(set (match_operand:VI48F 0 "register_operand" "=v")
+       (unspec:VI48F
+         [(match_operand:VI48F 1 "register_operand" "v")
           (match_operand:<sseintvecmode> 2 "register_operand" "0")
-          (match_operand:VI48F_512 3 "nonimmediate_operand" "vm")]
+          (match_operand:VI48F 3 "nonimmediate_operand" "vm")]
          UNSPEC_VPERMI2))]
   "TARGET_AVX512F"
   "vpermi2<ssemodesuffix>\t{%3, %1, %0<sd_mask_op4>|%0<sd_mask_op4>, %1, %3}"
@@ -15689,13 +15703,26 @@
    (set_attr "prefix" "evex")
    (set_attr "mode" "<sseinsnmode>")])
 
-(define_insn "avx512f_vpermi2var<mode>3_mask"
-  [(set (match_operand:VI48F_512 0 "register_operand" "=v")
-       (vec_merge:VI48F_512
-         (unspec:VI48F_512
-           [(match_operand:VI48F_512 1 "register_operand" "v")
+(define_insn "<avx512>_vpermi2var<mode>3<sd_maskz_name>"
+  [(set (match_operand:VI2_AVX512VL 0 "register_operand" "=v")
+       (unspec:VI2_AVX512VL
+         [(match_operand:VI2_AVX512VL 1 "register_operand" "v")
+          (match_operand:<sseintvecmode> 2 "register_operand" "0")
+          (match_operand:VI2_AVX512VL 3 "nonimmediate_operand" "vm")]
+         UNSPEC_VPERMI2))]
+  "TARGET_AVX512BW"
+  "vpermi2<ssemodesuffix>\t{%3, %1, %0<sd_mask_op4>|%0<sd_mask_op4>, %1, %3}"
+  [(set_attr "type" "sselog")
+   (set_attr "prefix" "evex")
+   (set_attr "mode" "<sseinsnmode>")])
+
+(define_insn "<avx512>_vpermi2var<mode>3_mask"
+  [(set (match_operand:VI48F 0 "register_operand" "=v")
+       (vec_merge:VI48F
+         (unspec:VI48F
+           [(match_operand:VI48F 1 "register_operand" "v")
            (match_operand:<sseintvecmode> 2 "register_operand" "0")
-           (match_operand:VI48F_512 3 "nonimmediate_operand" "vm")]
+           (match_operand:VI48F 3 "nonimmediate_operand" "vm")]
            UNSPEC_VPERMI2_MASK)
          (match_dup 0)
          (match_operand:<avx512fmaskmode> 4 "register_operand" "Yk")))]
@@ -15705,26 +15732,56 @@
    (set_attr "prefix" "evex")
    (set_attr "mode" "<sseinsnmode>")])
 
-(define_expand "avx512f_vpermt2var<mode>3_maskz"
-  [(match_operand:VI48F_512 0 "register_operand" "=v")
+(define_insn "<avx512>_vpermi2var<mode>3_mask"
+  [(set (match_operand:VI2_AVX512VL 0 "register_operand" "=v")
+       (vec_merge:VI2_AVX512VL
+         (unspec:VI2_AVX512VL
+           [(match_operand:VI2_AVX512VL 1 "register_operand" "v")
+           (match_operand:<sseintvecmode> 2 "register_operand" "0")
+           (match_operand:VI2_AVX512VL 3 "nonimmediate_operand" "vm")]
+           UNSPEC_VPERMI2_MASK)
+         (match_dup 0)
+         (match_operand:<avx512fmaskmode> 4 "register_operand" "Yk")))]
+  "TARGET_AVX512BW"
+  "vpermi2<ssemodesuffix>\t{%3, %1, %0%{%4%}|%0%{%4%}, %1, %3}"
+  [(set_attr "type" "sselog")
+   (set_attr "prefix" "evex")
+   (set_attr "mode" "<sseinsnmode>")])
+
+(define_expand "<avx512>_vpermt2var<mode>3_maskz"
+  [(match_operand:VI48F 0 "register_operand" "=v")
    (match_operand:<sseintvecmode> 1 "register_operand" "v")
-   (match_operand:VI48F_512 2 "register_operand" "0")
-   (match_operand:VI48F_512 3 "nonimmediate_operand" "vm")
+   (match_operand:VI48F 2 "register_operand" "0")
+   (match_operand:VI48F 3 "nonimmediate_operand" "vm")
    (match_operand:<avx512fmaskmode> 4 "register_operand" "Yk")]
   "TARGET_AVX512F"
 {
-  emit_insn (gen_avx512f_vpermt2var<mode>3_maskz_1 (
+  emit_insn (gen_<avx512>_vpermt2var<mode>3_maskz_1 (
        operands[0], operands[1], operands[2], operands[3],
        CONST0_RTX (<MODE>mode), operands[4]));
   DONE;
 })
 
-(define_insn "avx512f_vpermt2var<mode>3<sd_maskz_name>"
-  [(set (match_operand:VI48F_512 0 "register_operand" "=v")
-       (unspec:VI48F_512
+(define_expand "<avx512>_vpermt2var<mode>3_maskz"
+  [(match_operand:VI2_AVX512VL 0 "register_operand" "=v")
+   (match_operand:<sseintvecmode> 1 "register_operand" "v")
+   (match_operand:VI2_AVX512VL 2 "register_operand" "0")
+   (match_operand:VI2_AVX512VL 3 "nonimmediate_operand" "vm")
+   (match_operand:<avx512fmaskmode> 4 "register_operand" "Yk")]
+  "TARGET_AVX512BW"
+{
+  emit_insn (gen_<avx512>_vpermt2var<mode>3_maskz_1 (
+       operands[0], operands[1], operands[2], operands[3],
+       CONST0_RTX (<MODE>mode), operands[4]));
+  DONE;
+})
+
+(define_insn "<avx512>_vpermt2var<mode>3<sd_maskz_name>"
+  [(set (match_operand:VI48F 0 "register_operand" "=v")
+       (unspec:VI48F
          [(match_operand:<sseintvecmode> 1 "register_operand" "v")
-          (match_operand:VI48F_512 2 "register_operand" "0")
-          (match_operand:VI48F_512 3 "nonimmediate_operand" "vm")]
+          (match_operand:VI48F 2 "register_operand" "0")
+          (match_operand:VI48F 3 "nonimmediate_operand" "vm")]
          UNSPEC_VPERMT2))]
   "TARGET_AVX512F"
   "vpermt2<ssemodesuffix>\t{%3, %1, %0<sd_mask_op4>|%0<sd_mask_op4>, %1, %3}"
@@ -15732,13 +15789,26 @@
    (set_attr "prefix" "evex")
    (set_attr "mode" "<sseinsnmode>")])
 
-(define_insn "avx512f_vpermt2var<mode>3_mask"
-  [(set (match_operand:VI48F_512 0 "register_operand" "=v")
-       (vec_merge:VI48F_512
-         (unspec:VI48F_512
+(define_insn "<avx512>_vpermt2var<mode>3<sd_maskz_name>"
+  [(set (match_operand:VI2_AVX512VL 0 "register_operand" "=v")
+       (unspec:VI2_AVX512VL
+         [(match_operand:<sseintvecmode> 1 "register_operand" "v")
+          (match_operand:VI2_AVX512VL 2 "register_operand" "0")
+          (match_operand:VI2_AVX512VL 3 "nonimmediate_operand" "vm")]
+         UNSPEC_VPERMT2))]
+  "TARGET_AVX512BW"
+  "vpermt2<ssemodesuffix>\t{%3, %1, %0<sd_mask_op4>|%0<sd_mask_op4>, %1, %3}"
+  [(set_attr "type" "sselog")
+   (set_attr "prefix" "evex")
+   (set_attr "mode" "<sseinsnmode>")])
+
+(define_insn "<avx512>_vpermt2var<mode>3_mask"
+  [(set (match_operand:VI48F 0 "register_operand" "=v")
+       (vec_merge:VI48F
+         (unspec:VI48F
            [(match_operand:<sseintvecmode> 1 "register_operand" "v")
-           (match_operand:VI48F_512 2 "register_operand" "0")
-           (match_operand:VI48F_512 3 "nonimmediate_operand" "vm")]
+           (match_operand:VI48F 2 "register_operand" "0")
+           (match_operand:VI48F 3 "nonimmediate_operand" "vm")]
            UNSPEC_VPERMT2)
          (match_dup 2)
          (match_operand:<avx512fmaskmode> 4 "register_operand" "Yk")))]
@@ -15748,6 +15818,22 @@
    (set_attr "prefix" "evex")
    (set_attr "mode" "<sseinsnmode>")])
 
+(define_insn "<avx512>_vpermt2var<mode>3_mask"
+  [(set (match_operand:VI2_AVX512VL 0 "register_operand" "=v")
+       (vec_merge:VI2_AVX512VL
+         (unspec:VI2_AVX512VL
+           [(match_operand:<sseintvecmode> 1 "register_operand" "v")
+           (match_operand:VI2_AVX512VL 2 "register_operand" "0")
+           (match_operand:VI2_AVX512VL 3 "nonimmediate_operand" "vm")]
+           UNSPEC_VPERMT2)
+         (match_dup 2)
+         (match_operand:<avx512fmaskmode> 4 "register_operand" "Yk")))]
+  "TARGET_AVX512BW"
+  "vpermt2<ssemodesuffix>\t{%3, %1, %0%{%4%}|%0%{%4%}, %1, %3}"
+  [(set_attr "type" "sselog")
+   (set_attr "prefix" "evex")
+   (set_attr "mode" "<sseinsnmode>")])
+
 (define_expand "avx_vperm2f128<mode>3"
   [(set (match_operand:AVX256MODE2P 0 "register_operand")
        (unspec:AVX256MODE2P