re PR target/10177 (VRsave mask wrong)

2002-03-31  Segher Boessenkool  <segher@koffie.nl>

        PR target/10177
        * config/rs6000/rs6000.h (HARD_REGNO_RENAME_OK): New.
        * config/rs6000/rs6000.c (compute_vrsave_mask):
        Don't mark all call-clobbered registers as used.

From-SVN: r65092

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 15df443f5106b26e61a73236b9e1aae59095b161..8a84e12f63dd108ee35a5d204fcce645eb7bc0ae 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,10 @@
+2002-03-31  Segher Boessenkool  <segher@koffie.nl>
+
+       PR target/10177
+       * config/rs6000/rs6000.h (HARD_REGNO_RENAME_OK): New.
+       * config/rs6000/rs6000.c (compute_vrsave_mask): Don't mark
+       all call-clobbered registers as used.
+
 2003-03-31  Michael Matz  <matz@suse.de>
 
        * cppexp.c (cpp_classify_number): Accept '.' after "0x".

diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c
index ff3f940fca9ac3f0d1e7848456efcd31ab1b7526..b91052020c409a3a146bd4c369a524f3857ea62d 100644 (file)
--- a/gcc/config/rs6000/rs6000.c
+++ b/gcc/config/rs6000/rs6000.c
@@ -9021,19 +9021,6 @@ compute_vrsave_mask ()
   if (mask == 0)
     return mask;
 
-  /* Next, add all registers that are call-clobbered.  We do this
-     because post-reload register optimizers such as regrename_optimize
-     may choose to use them.  They never change the register class
-     chosen by reload, so cannot create new uses of altivec registers
-     if there were none before, so the early exit above is safe.  */
-  /* ??? Alternately, we could define HARD_REGNO_RENAME_OK to disallow
-     altivec registers not saved in the mask, which might well make the
-     adjustments below more effective in eliding the save/restore of
-     VRSAVE in small functions.  */
-  for (i = FIRST_ALTIVEC_REGNO; i <= LAST_ALTIVEC_REGNO; ++i)
-    if (call_used_regs[i])
-      mask |= ALTIVEC_REG_BIT (i);
-
   /* Next, remove the argument registers from the set.  These must
      be in the VRSAVE mask set by the caller, so we don't need to add
      them in again.  More importantly, the mask we compute here is

diff --git a/gcc/config/rs6000/rs6000.h b/gcc/config/rs6000/rs6000.h
index 58d5d5b66ffe98cdc06613d75cdf2de5e654d08a..b13c4030b58f5002839862ba0507f5c56a3c5809 100644 (file)
--- a/gcc/config/rs6000/rs6000.h
+++ b/gcc/config/rs6000/rs6000.h
@@ -961,6 +961,12 @@ extern int rs6000_default_long_calls;
    ? ALTIVEC_VECTOR_MODE (MODE1)               \
    : 1)
 
+/* Post-reload, we can't use any new AltiVec registers, as we already
+   emitted the vrsave mask.  */
+
+#define HARD_REGNO_RENAME_OK(SRC, DST) \
+  (! ALTIVEC_REGNO_P (DST) || regs_ever_live[DST])
+
 /* A C expression returning the cost of moving data from a register of class
    CLASS1 to one of CLASS2.  */