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X86: Mark IO space accesses as uncachable.
author
Gabe Black
<gblack@eecs.umich.edu>
Mon, 22 Nov 2010 10:49:03 +0000
(
05:49
-0500)
committer
Gabe Black
<gblack@eecs.umich.edu>
Mon, 22 Nov 2010 10:49:03 +0000
(
05:49
-0500)
src/arch/x86/tlb.cc
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diff --git
a/src/arch/x86/tlb.cc
b/src/arch/x86/tlb.cc
index dbba52af0e11965bb0e87102e051c44ca6d020b3..4c8d96f8b1dae6ab1f0564c567b6f713dc4b0f1f 100644
(file)
--- a/
src/arch/x86/tlb.cc
+++ b/
src/arch/x86/tlb.cc
@@
-511,6
+511,7
@@
TLB::translateInt(RequestPtr req, ThreadContext *tc)
req->setFlags(Request::MMAPED_IPR);
req->setPaddr(MISCREG_PCI_CONFIG_ADDRESS * sizeof(MiscReg));
} else if ((IOPort & ~mask(2)) == 0xCFC) {
+ req->setFlags(Request::UNCACHEABLE);
Addr configAddress =
tc->readMiscRegNoEffect(MISCREG_PCI_CONFIG_ADDRESS);
if (bits(configAddress, 31, 31)) {
@@
-519,6
+520,7
@@
TLB::translateInt(RequestPtr req, ThreadContext *tc)
(IOPort & mask(2)));
}
} else {
+ req->setFlags(Request::UNCACHEABLE);
req->setPaddr(PhysAddrPrefixIO | IOPort);
}
return NoFault;