HDL_wokflow update ulx3s jtag jumper wire connection images to be

smaller

diff --git a/HDL_workflow/jtag_wires_ulx3s_fpga.jpg b/HDL_workflow/jtag_wires_ulx3s_fpga.jpg
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Binary files a/HDL_workflow/jtag_wires_ulx3s_fpga.jpg and b/HDL_workflow/jtag_wires_ulx3s_fpga.jpg differ

diff --git a/HDL_workflow/jtag_wires_ulx3s_stlinkv2_opposite_orientation_to_jtag.jpg b/HDL_workflow/jtag_wires_ulx3s_stlinkv2_opposite_orientation_to_jtag.jpg
index 7d2687c5c9bfa74d553b69038c4d2e253683d14b..103906b9dcd1369fd126891a55abd2089fc75a1d 100644 (file)
Binary files a/HDL_workflow/jtag_wires_ulx3s_stlinkv2_opposite_orientation_to_jtag.jpg and b/HDL_workflow/jtag_wires_ulx3s_stlinkv2_opposite_orientation_to_jtag.jpg differ

diff --git a/HDL_workflow/jtag_wires_ulx3s_stlinkv2_same_orientation_as_jtag.jpg b/HDL_workflow/jtag_wires_ulx3s_stlinkv2_same_orientation_as_jtag.jpg
index 6e5f8f6855f55cda48f0f3dbc6fbc80be845857a..beb8e2198343238a119526e5e61e741648955f90 100644 (file)
Binary files a/HDL_workflow/jtag_wires_ulx3s_stlinkv2_same_orientation_as_jtag.jpg and b/HDL_workflow/jtag_wires_ulx3s_stlinkv2_same_orientation_as_jtag.jpg differ