mode, which will truncate SVSTATE.VL at the point of the first failed
test.*)
-SVP64 RM `MODE` for Branch Conditional:
-
-| 0-1 | 2 | 3 4 | description |
-| --- | --- |---------|-------------------------- |
-| 00 | SNZ | ALL sz | normal mode |
-| 01 | VLI | ALL sz | VLSET mode |
-| 10 | SNZ | ALL sz | svstep mode |
-| 11 | VLI | ALL sz | svstep VLSET mode, in Horizontal-First |
-| 11 | VLI | SNZ sz | svstep VLSET mode, in Vertical-First |
+SVP64 RM `MODE` (includes `ELWIDTH` bits) for Branch Conditional:
+
+| 4 | 5 | 19 | 20 | 21 | 22 23 | description |
+| - | - | -- | -- | --- |---------|-------------------------- |
+|ALL| / | 0 | 0 | / | SNZ sz | normal mode |
+|ALL| / | 0 | 1 | VLI | SNZ sz | VLSET mode |
+|ALL| / | 1 | 0 | / | SNZ sz | svstep mode |
+|ALL| / | 1 | 1 | VLI | SNZ sz | svstep+VLSET mode |
Fields: