[sim,xcc,opcodes] added back mtflh.d

diff --git a/riscv/execute.h b/riscv/execute.h
index 9cc56ab7605aa71887c1a3d0396332234d87caff..48f6d34373e54318390ac58173d9c72d3a10662e 100644 (file)
--- a/riscv/execute.h
+++ b/riscv/execute.h
@@ -908,7 +908,7 @@ switch((insn.bits >> 0x0) & 0x7f)
           #include "insns/mffh_d.h"
           break;
         }
-        if((insn.bits & 0x1ffff) == 0x1ced3)
+        if((insn.bits & 0x3fffff) == 0x1ced3)
         {
           #include "insns/mtf_d.h"
           break;
@@ -923,6 +923,11 @@ switch((insn.bits >> 0x0) & 0x7f)
           #include "insns/fc_lt_d.h"
           break;
         }
+        if((insn.bits & 0x1ffff) == 0x1eed3)
+        {
+          #include "insns/mtflh_d.h"
+          break;
+        }
         if((insn.bits & 0x1ffff) == 0x15ed3)
         {
           #include "insns/fc_eq_d.h"

diff --git a/riscv/insns/mtf_d.h b/riscv/insns/mtf_d.h
index b03697b1bc276b7f21b9998a3583c7807c7548f0..29792ec425b41048e960568fc37f712dcc13eeae 100644 (file)
--- a/riscv/insns/mtf_d.h
+++ b/riscv/insns/mtf_d.h
@@ -1,5 +1,3 @@
+require_xpr64;
 require_fp;
-if(xpr64)
-  FRD = RS1;
-else
-  FRD = (RS1 & 0x00000000FFFFFFFF) | (RS2 << 32);
+FRD = RS1;

diff --git a/riscv/insns/mtflh_d.h b/riscv/insns/mtflh_d.h
new file mode 100644 (file)
index 0000000..ac87afb
--- /dev/null
+++ b/riscv/insns/mtflh_d.h
@@ -0,0 +1,3 @@
+require_xpr32;
+require_fp;
+FRD = (RS1 & 0x00000000FFFFFFFF) | (RS2 << 32);