if (R200_DEBUG & (DEBUG_IOCTL|DEBUG_PRIMS))
fprintf(stderr, "%s %x %d\n", __FUNCTION__, rmesa->tcl.hw_primitive, elt_used);
- assert( rmesa->tcl.flush == r200FlushElts );
- rmesa->tcl.flush = NULL;
+ assert( rmesa->radeon.dma.flush == r200FlushElts );
+ rmesa->radeon.dma.flush = NULL;
elt_used = (elt_used + 2) & ~2;
fprintf(stderr, "%s: header prim %x \n",
__FUNCTION__, primitive);
- assert(!rmesa->tcl.flush);
+ assert(!rmesa->radeon.dma.flush);
rmesa->radeon.glCtx->Driver.NeedFlush |= FLUSH_STORED_VERTICES;
- rmesa->tcl.flush = r200FlushElts;
+ rmesa->radeon.dma.flush = r200FlushElts;
return retval;
}
r200DestroySwtcl( rmesa->radeon.glCtx );
r200ReleaseArrays( rmesa->radeon.glCtx, ~0 );
- if (rmesa->dma.current) {
- radeonReleaseDmaRegion(rmesa);
+ if (rmesa->radeon.dma.current) {
+ radeonReleaseDmaRegion(&rmesa->radeon);
rcommonFlushCmdBuf( &rmesa->radeon, __FUNCTION__ );
}
int elt_dma_offset; /** Offset into this buffer object, in bytes */
int elt_used;
- void (*flush) (GLcontext *ctx);
struct radeon_dma_region vertex_data[15];
};
GLboolean needproj;
struct radeon_bo *bo;
- void (*flush) (GLcontext *ctx);
};
/* Vertex buffers
*/
struct radeon_ioctl ioctl;
- struct radeon_dma dma;
struct radeon_store store;
/* A full state emit as of the first state emit in the main store, in case
* the context is lost.
rmesa->radeon.lost_context = GL_FALSE;
- nr_released_bufs = rmesa->dma.nr_released_bufs;
+ nr_released_bufs = rmesa->radeon.dma.nr_released_bufs;
saved_store = rmesa->store;
- rmesa->dma.nr_released_bufs = 0;
+ rmesa->radeon.dma.nr_released_bufs = 0;
rmesa->store = rmesa->backup_store;
rcommonFlushCmdBufLocked( &rmesa->radeon, __FUNCTION__ );
- rmesa->dma.nr_released_bufs = nr_released_bufs;
+ rmesa->radeon.dma.nr_released_bufs = nr_released_bufs;
rmesa->store = saved_store;
}
if (R200_DEBUG & DEBUG_IOCTL)
fprintf(stderr, "%s\n", __FUNCTION__);
- if (rmesa->swtcl.flush)
- rmesa->swtcl.flush( ctx );
-
- if (rmesa->tcl.flush)
- rmesa->tcl.flush( ctx );
+ if (rmesa->radeon.dma.flush)
+ rmesa->radeon.dma.flush( ctx );
r200EmitState( rmesa );
*/
#define R200_NEWPRIM( rmesa ) \
do { \
- if ( rmesa->swtcl.flush ) \
- rmesa->swtcl.flush( rmesa->radeon.glCtx ); \
+ if ( rmesa->radeon.dma.flush ) \
+ rmesa->radeon.dma.flush( rmesa->radeon.glCtx ); \
} while (0)
/* Can accomodate several state changes and primitive changes without
*/
#define R200_FIREVERTICES( rmesa ) \
do { \
- if ( rmesa->swtcl.flush || rmesa->tcl.flush ) { \
+ if ( rmesa->radeon.dma.flush ) { \
r200Flush( rmesa->radeon.glCtx ); \
} \
} while (0)
if (R200_DEBUG & DEBUG_IOCTL)
fprintf(stderr, "%s\n", __FUNCTION__);
- rmesa->swtcl.flush = NULL;
+ rmesa->radeon.dma.flush = NULL;
radeon_bo_unmap(rmesa->swtcl.bo);
rcommonEnsureCmdBufSpace(rmesa,
rmesa->swtcl.bo = radeon_bo_open(rmesa->radeon.radeonScreen->bom,
0, bytes, 4, RADEON_GEM_DOMAIN_GTT, 0);
radeon_bo_map(rmesa->swtcl.bo, 1);
- if (rmesa->swtcl.flush == NULL) {
+ if (rmesa->radeon.dma.flush == NULL) {
rmesa->radeon.glCtx->Driver.NeedFlush |= FLUSH_STORED_VERTICES;
- rmesa->swtcl.flush = flush_last_swtcl_prim;
+ rmesa->radeon.dma.flush = flush_last_swtcl_prim;
}
return rmesa->swtcl.bo->ptr;
static GLushort *r200AllocElts( r200ContextPtr rmesa, GLuint nr )
{
// fprintf(stderr,"alloc elts %d %d\n", nr, rmesa->tcl.elt_used);
- if (rmesa->tcl.flush == r200FlushElts &&
+ if (rmesa->radeon.dma.flush == r200FlushElts &&
rmesa->tcl.elt_used + nr*2 < R200_ELT_BUF_SZ) {
GLushort *dest = (GLushort *)(rmesa->tcl.elt_dma_bo->ptr +
return dest;
}
else {
- if (rmesa->tcl.flush)
- rmesa->tcl.flush( rmesa->radeon.glCtx );
+ if (rmesa->radeon.dma.flush)
+ rmesa->radeon.dma.flush( rmesa->radeon.glCtx );
rcommonEnsureCmdBufSpace(rmesa, AOS_BUFSZ(rmesa->tcl.nr_aos_components));
r200TclPrimitive( ctx, prim, hwprim );
// fprintf(stderr,"Emit prim %d\n", rmesa->tcl.nr_aos_components);
- rcommonEnsureCmdBufSpace( rmesa, AOS_BUFSZ(rmesa->tcl.nr_aos_components) +
+ rcommonEnsureCmdBufSpace( &rmesa->radeon,
+ AOS_BUFSZ(rmesa->tcl.nr_aos_components) +
rmesa->hw.max_state_size + VBUF_BUFSZ );
r200EmitAOS( rmesa,
tnl->Driver.NotifyMaterialChange = r200UpdateMaterial;
- if ( rmesa->swtcl.flush )
- rmesa->swtcl.flush( rmesa->radeon.glCtx );
+ if ( rmesa->radeon.dma.flush )
+ rmesa->radeon.dma.flush( rmesa->radeon.glCtx );
- rmesa->swtcl.flush = NULL;
+ rmesa->radeon.dma.flush = NULL;
R200_STATECHANGE( rmesa, vap );
rmesa->hw.vap.cmd[VAP_SE_VAP_CNTL] |= R200_VAP_TCL_ENABLE;