+2015-01-05 Oleg Endo <olegendo@gcc.gnu.org>
+
+ * rtlanal.c (refers_to_regno_p): Change return value from int to bool.
+ * rtl.h (refers_to_regno_p): Add overload.
+ * cse.c: Use it.
+ * bt-load.c: Likewise.
+ * combine.c: Likewise.
+ * df-scan.c: Likewise.
+ * sched-deps.c: Likewise.
+ * config/s390/s390.c: Likewise.
+ * config/m32r/m32r.c: Likewise.
+ * config/rs6000/spe.md: Likewise.
+ * config/rs6000/rs6000.c: Likewise.
+ * config/pa/pa.c: Likewise.
+ * config/stormy16/stormy16.c: Likewise.
+ * config/cris/cris.c: Likewise.
+ * config/arc/arc.md: Likewise.
+ * config/arc/arc.c: Likewise.
+ * config/sh/sh.md: Likewise.
+ * config/sh/sh.c: Likewise.
+ * config/frv/frv.c: Likewise.
+
2015-01-05 Jakub Jelinek <jakub@redhat.com>
PR sanitizer/64265
int reg;
for (reg = first_btr; reg <= last_btr; reg++)
if (TEST_HARD_REG_BIT (all_btrs, reg)
- && refers_to_regno_p (reg, reg + 1, user->insn,
- NULL))
+ && refers_to_regno_p (reg, user->insn))
{
note_other_use_this_block (reg,
info.users_this_bb);
int regno;
for (regno = first_btr; regno <= last_btr; regno++)
- if (refers_to_regno_p (regno, regno+1, insn, NULL))
+ if (refers_to_regno_p (regno, insn))
SET_HARD_REG_BIT (btrs_live_at_end[i], regno);
}
bitmap_clear (reaching_defs_of_reg);
for (reg = first_btr; reg <= last_btr; reg++)
if (TEST_HARD_REG_BIT (all_btrs, reg)
- && refers_to_regno_p (reg, reg + 1, user->insn,
- NULL))
+ && refers_to_regno_p (reg, user->insn))
bitmap_or_and (reaching_defs_of_reg,
reaching_defs_of_reg,
reaching_defs,
unsigned int i;
for (i = regno; i < endregno; i++)
- if ((! refers_to_regno_p (i, i + 1, PATTERN (place), 0)
+ if ((! refers_to_regno_p (i, PATTERN (place))
&& ! find_regno_fusage (place, USE, i))
|| dead_or_set_regno_p (place, i))
{
NULL, NULL_RTX, NULL_RTX,
NULL_RTX);
}
- else if (! refers_to_regno_p (i, i + 1,
- PATTERN (place), 0)
+ else if (! refers_to_regno_p (i, PATTERN (place))
&& ! find_regno_fusage (place, USE, i))
for (tem_insn = PREV_INSN (place); ;
tem_insn = PREV_INSN (tem_insn))
int i, j;
rtx tem;
- if (REG_P (x) && refers_to_regno_p (regno, regno+1, x, (rtx *) 0))
+ if (REG_P (x) && refers_to_regno_p (regno, x))
return x;
fmt = GET_RTX_FORMAT (GET_CODE (x));
last. Otherwise, load it first. Note that we cannot have
auto-increment in that case since the address register is known to be
dead. */
- if (refers_to_regno_p (REGNO (operands[0]), REGNO (operands[0]) + 1,
- operands [1], 0))
+ if (refers_to_regno_p (REGNO (operands[0]), operands[1]))
return \"ld%V1 %R0,%R1\;ld%V1 %0,%1\";
else switch (GET_CODE (XEXP(operands[1], 0)))
{
/* If the high-address word is used in the address, we must load it
last. Otherwise, load it first. */
rtx addr = XEXP (src, 0);
- int reverse
- = (refers_to_regno_p (dregno, dregno + 1, addr, NULL) != 0);
+ int reverse = (refers_to_regno_p (dregno, addr) != 0);
/* The original code implies that we can't do
move.x [rN+],rM move.x [rN],rM+1
of the registers could affect the value of ADDRESS, so we must
be careful which order we do them in. */
if (GET_CODE (address) == PRE_MODIFY
- || ! refers_to_regno_p (regno, regno + 1, address, NULL))
+ || ! refers_to_regno_p (regno, address))
{
/* It is safe to load the lower-numbered register first. */
emit_move_insn (dest1, change_address (source, SImode, NULL));
{
/* If the high-address word is used in the address, we must load it
last. Otherwise, load it first. */
- int reverse
- = (refers_to_regno_p (dregno, dregno + 1, XEXP (src, 0), 0) != 0);
+ int reverse = refers_to_regno_p (dregno, XEXP (src, 0));
/* We used to optimize loads from single registers as
Handle mem -> register case first. */
if (optype0 == REGOP
&& (optype1 == MEMOP || optype1 == OFFSOP)
- && refers_to_regno_p (REGNO (operands[0]), REGNO (operands[0]) + 1,
- operands[1], 0))
+ && refers_to_regno_p (REGNO (operands[0]), operands[1]))
{
/* Do the late half first. */
if (addreg1)
return "lwz %2,0(%1)";
for (i = 0; i < words; i++)
- if (refers_to_regno_p (REGNO (operands[2]) + i,
- REGNO (operands[2]) + i + 1, operands[1], 0))
+ if (refers_to_regno_p (REGNO (operands[2]) + i, operands[1]))
{
if (i == words-1)
{
it last. Otherwise, load it first. Note that we cannot have
auto-increment in that case since the address register is
known to be dead. */
- if (refers_to_regno_p (REGNO (operands[0]), REGNO (operands[0]) + 1,
- operands[1], 0))
+ if (refers_to_regno_p (REGNO (operands[0]), operands[1]))
{
if (WORDS_BIG_ENDIAN)
return \"lwz %L0,%L1\;lwz %0,%1\";
else
return \"evldd%X1 %Y0,%y1\;evmergehi %Z0,%Y0,%Y0\";
}
- if (refers_to_regno_p (REGNO (operands[0]), REGNO (operands[0]) + 1,
- operands[1], 0))
+ if (refers_to_regno_p (REGNO (operands[0]), operands[1]))
{
if (WORDS_BIG_ENDIAN)
return \"lwz %Z0,%L1\;lwz %Y0,%1\";
if (code == MEM)
{
- if (refers_to_regno_p (regno, regno+1,
- XEXP (x, 0), 0))
+ if (refers_to_regno_p (regno, XEXP (x, 0)))
return true;
}
else if (code == SET
&& GET_CODE (SET_DEST (x)) == PC)
{
- if (refers_to_regno_p (regno, regno+1,
- SET_SRC (x), 0))
+ if (refers_to_regno_p (regno, SET_SRC (x)))
return true;
}
pat = XVECEXP (pat, 0, 0);
}
gcc_assert (GET_CODE (pat) == SET);
- return refers_to_regno_p (regno, regno+1, SET_SRC (pat), 0);
+ return refers_to_regno_p (regno, SET_SRC (pat));
}
else if (get_attr_atype (insn) == ATYPE_AGEN)
return reg_used_in_mem_p (regno, PATTERN (insn));
reload will fail to find a spill register for rX, since r0 is already
being used for the source. */
else if (TARGET_SH1
- && refers_to_regno_p (R0_REG, R0_REG + 1, operands[1], (rtx *)0)
+ && refers_to_regno_p (R0_REG, operands[1])
&& MEM_P (operands[0])
&& GET_CODE (XEXP (operands[0], 0)) == PLUS
&& REG_P (XEXP (XEXP (operands[0], 0), 1)))
{
offset_in_r0 = -1;
sp_in_r0 = 0;
- gcc_assert (!refers_to_regno_p
- (R0_REG, R0_REG+1, mem_rtx, (rtx *) 0));
+ gcc_assert (!refers_to_regno_p (R0_REG, mem_rtx));
}
if (*++tmp_pnt <= 0)
gcc_unreachable ();
}
- if (regno == -1
- || ! refers_to_regno_p (regno, regno + 1, operands[1], 0))
+ if (regno == -1 || ! refers_to_regno_p (regno, operands[1]))
{
operands[2] = operand_subword (operands[0], 0, 0, DImode);
operands[3] = operand_subword (operands[1], 0, 0, DImode);
alter_subreg (&word0, true);
word1 = gen_rtx_SUBREG (SImode, regop, 4);
alter_subreg (&word1, true);
- if (store_p || ! refers_to_regno_p (REGNO (word0),
- REGNO (word0) + 1, addr, 0))
+ if (store_p || ! refers_to_regno_p (REGNO (word0), addr))
{
emit_insn (store_p
? gen_movsi_ie (mem, word0)
gcc_unreachable ();
}
- if (regno == -1
- || ! refers_to_regno_p (regno, regno + 1, operands[1], 0))
+ if (regno == -1 || ! refers_to_regno_p (regno, operands[1]))
{
operands[2] = operand_subword (operands[0], 0, 0, DFmode);
operands[3] = operand_subword (operands[1], 0, 0, DFmode);
gcc_assert (refers_to_regno_p (regno, regno + num_words,
mem_operand, 0));
- if (refers_to_regno_p (regno, regno + 1, mem_operand, 0))
+ if (refers_to_regno_p (regno, mem_operand))
direction = -1;
else if (refers_to_regno_p (regno + num_words - 1, regno + num_words,
mem_operand, 0))
for (p = table[i]; p; p = next)
{
next = p->next_same_hash;
- if (!REG_P (p->exp)
- && refers_to_regno_p (regno, regno + 1, p->exp, (rtx *) 0))
+ if (!REG_P (p->exp) && refers_to_regno_p (regno, p->exp))
remove_from_table (p, i);
}
}
|| (((SUBREG_BYTE (exp)
+ (GET_MODE_SIZE (GET_MODE (exp)) - 1)) >= offset)
&& SUBREG_BYTE (exp) <= end))
- && refers_to_regno_p (regno, regno + 1, p->exp, (rtx *) 0))
+ && refers_to_regno_p (regno, p->exp))
remove_from_table (p, i);
}
}
&& !TEST_HARD_REG_BIT (defs_generated, i)
&& (!is_sibling_call
|| !bitmap_bit_p (df->exit_block_uses, i)
- || refers_to_regno_p (i, i+1,
- crtl->return_rtx, NULL)))
+ || refers_to_regno_p (i, crtl->return_rtx)))
df_ref_record (DF_REF_BASE, collection_rec, regno_reg_rtx[i],
NULL, bb, insn_info, DF_REF_REG_DEF,
DF_REF_MAY_CLOBBER | flags);
extern int multiple_sets (const_rtx);
extern int set_noop_p (const_rtx);
extern int noop_move_p (const_rtx);
-extern int refers_to_regno_p (unsigned int, unsigned int, const_rtx, rtx *);
+extern bool refers_to_regno_p (unsigned int, unsigned int, const_rtx, rtx *);
extern int reg_overlap_mentioned_p (const_rtx, const_rtx);
extern const_rtx set_of (const_rtx, const_rtx);
extern void record_hard_reg_sets (rtx, const_rtx, void *);
extern int computed_jump_p (const_rtx);
extern bool tls_referenced_p (const_rtx);
+/* Overload for refers_to_regno_p for checking a single register. */
+inline bool
+refers_to_regno_p (unsigned int regnum, const_rtx x, rtx* loc = NULL)
+{
+ return refers_to_regno_p (regnum, regnum + 1, x, loc);
+}
+
/* Callback for for_each_inc_dec, to process the autoinc operation OP
within MEM that sets DEST to SRC + SRCOFF, or SRC if SRCOFF is
NULL. The callback is passed the same opaque ARG passed to
References contained within the substructure at LOC do not count.
LOC may be zero, meaning don't ignore anything. */
-int
+bool
refers_to_regno_p (unsigned int regno, unsigned int endregno, const_rtx x,
rtx *loc)
{
/* The contents of a REG_NONNEG note is always zero, so we must come here
upon repeat in case the last REG_NOTE is a REG_NONNEG note. */
if (x == 0)
- return 0;
+ return false;
code = GET_CODE (x);
#endif
|| x_regno == FRAME_POINTER_REGNUM)
&& regno >= FIRST_VIRTUAL_REGISTER && regno <= LAST_VIRTUAL_REGISTER)
- return 1;
+ return true;
return endregno > x_regno && regno < END_REGNO (x);
SUBREG_REG (SET_DEST (x)), loc))
|| (!REG_P (SET_DEST (x))
&& refers_to_regno_p (regno, endregno, SET_DEST (x), loc))))
- return 1;
+ return true;
if (code == CLOBBER || loc == &SET_SRC (x))
- return 0;
+ return false;
x = SET_SRC (x);
goto repeat;
}
else
if (refers_to_regno_p (regno, endregno, XEXP (x, i), loc))
- return 1;
+ return true;
}
else if (fmt[i] == 'E')
{
for (j = XVECLEN (x, i) - 1; j >= 0; j--)
if (loc != &XVECEXP (x, i, j)
&& refers_to_regno_p (regno, endregno, XVECEXP (x, i, j), loc))
- return 1;
+ return true;
}
}
- return 0;
+ return false;
}
/* Nonzero if modifying X will affect IN. If X is a register or a SUBREG,
{
rtx other = XEXP (list, 0);
if (INSN_CACHED_COND (other) != const_true_rtx
- && refers_to_regno_p (i, i + 1, INSN_CACHED_COND (other), NULL))
+ && refers_to_regno_p (i, INSN_CACHED_COND (other)))
INSN_CACHED_COND (other) = const_true_rtx;
}
}