iterators.md (qhs_extenddi_op): New mode_attr.
authorBernd Schmidt <bernds@codesourcery.com>
Tue, 21 Sep 2010 13:11:03 +0000 (13:11 +0000)
committerBernd Schmidt <bernds@gcc.gnu.org>
Tue, 21 Sep 2010 13:11:03 +0000 (13:11 +0000)
* config/arm/iterators.md (qhs_extenddi_op): New mode_attr.
(qhs_extenddi_cstr): Likewise.
* config/arm/arm.md (zero_extend<mode>di2, extend<mode>di2): Use
them for the source operand.

From-SVN: r164477

gcc/ChangeLog
gcc/config/arm/arm.md
gcc/config/arm/iterators.md

index 97f25e7332294d36d21c208bf4e4c0af8768e786..8edc8004c91b1e80214ed90a019d47867ebafad7 100644 (file)
@@ -1,3 +1,10 @@
+2010-09-21  Bernd Schmidt  <bernds@codesourcery.com>
+
+       * config/arm/iterators.md (qhs_extenddi_op): New mode_attr.
+       (qhs_extenddi_cstr): Likewise.
+       * config/arm/arm.md (zero_extend<mode>di2, extend<mode>di2): Use
+       them for the source operand.
+
 2010-09-21  Uros Bizjak  <ubizjak@gmail.com>
 
        * config/i386/i386.c (ix86_split_ashl): Rename single_width variable
index 47be462bb1e6b634620e25c3a7d9074c45b0b993..c54bb2a1f379eb516927b6f71c8f89061f9609bb 100644 (file)
 
 (define_insn "zero_extend<mode>di2"
   [(set (match_operand:DI 0 "s_register_operand" "=r")
-        (zero_extend:DI (match_operand:QHSI 1 "nonimmediate_operand" "rm")))]
+        (zero_extend:DI (match_operand:QHSI 1 "<qhs_extenddi_op>"
+                                           "<qhs_extenddi_cstr>")))]
   "TARGET_32BIT <qhs_zextenddi_cond>"
   "#"
   [(set_attr "length" "8")
 
 (define_insn "extend<mode>di2"
   [(set (match_operand:DI 0 "s_register_operand" "=r")
-        (sign_extend:DI (match_operand:QHSI 1 "nonimmediate_operand" "rm")))]
+        (sign_extend:DI (match_operand:QHSI 1 "<qhs_extenddi_op>"
+                                           "<qhs_extenddi_cstr>")))]
   "TARGET_32BIT <qhs_sextenddi_cond>"
   "#"
   [(set_attr "length" "8")
index 8e9f1001aba6377db311b81df4b8077b05081b7f..887c962baeb9efad94d6409c4dbbd9926931b5a8 100644 (file)
 (define_mode_attr qhs_zextenddi_cond [(SI "") (HI "&& arm_arch6") (QI "")])
 (define_mode_attr qhs_sextenddi_cond [(SI "") (HI "&& arm_arch6")
                                      (QI "&& arm_arch6")])
+(define_mode_attr qhs_extenddi_op [(SI "s_register_operand")
+                                  (HI "nonimmediate_operand")
+                                  (QI "nonimmediate_operand")])
+(define_mode_attr qhs_extenddi_cstr [(SI "r") (HI "rm") (QI "rm")])
 
 ;;----------------------------------------------------------------------------
 ;; Code attributes