config: Add voltage domain to Ruby example scripts

This patch adds the minimum required voltage domain configuration to
the Ruby example scripts.

diff --git a/configs/example/ruby_direct_test.py b/configs/example/ruby_direct_test.py
index e4d4c73f81ad8c062a19e74c8c131dccf6e765e5..fe96bdc2ddb68b950ef03c14fae20716526750a2 100644 (file)
--- a/configs/example/ruby_direct_test.py
+++ b/configs/example/ruby_direct_test.py
@@ -92,8 +92,14 @@ else:
 # actually used by the rubytester, but is included to support the
 # M5 memory size == Ruby memory size checks
 #
-system = System(physmem = SimpleMemory(),
-                clk_domain = SrcClockDomain(clock =  options.sys_clock))
+system = System(physmem = SimpleMemory())
+
+
+# Create a top-level voltage domain and clock domain
+system.voltage_domain = VoltageDomain(voltage = options.sys_voltage)
+
+system.clk_domain = SrcClockDomain(clock = options.sys_clock,
+                                   voltage_domain = system.voltage_domain)
 
 #
 # Create the ruby random tester
@@ -105,7 +111,8 @@ system.tester = RubyDirectedTester(requests_to_complete = \
 Ruby.create_system(options, system)
 
 # Since Ruby runs at an independent frequency, create a seperate clock
-system.ruby.clk_domain = SrcClockDomain(clock = options.ruby_clock)
+system.ruby.clk_domain = SrcClockDomain(clock = options.ruby_clock,
+                                        voltage_domain = system.voltage_domain)
 
 assert(options.num_cpus == len(system.ruby._cpu_ruby_ports))
 

diff --git a/configs/example/ruby_fs.py b/configs/example/ruby_fs.py
index 60c4be2b322cba28366e9a6df46b67964774f726..ee7a6b33a3e5b55867c7d342620210861b07c16c 100644 (file)
--- a/configs/example/ruby_fs.py
+++ b/configs/example/ruby_fs.py
@@ -90,7 +90,11 @@ elif buildEnv['TARGET_ISA'] == "x86":
 else:
     fatal("incapable of building non-alpha or non-x86 full system!")
 
-system.clk_domain = SrcClockDomain(clock = options.sys_clock)
+# Create a top-level voltage domain and clock domain
+system.voltage_domain = VoltageDomain(voltage = options.sys_voltage)
+
+system.clk_domain = SrcClockDomain(clock = options.sys_clock,
+                                   voltage_domain = system.voltage_domain)
 
 if options.kernel is not None:
     system.kernel = binary(options.kernel)
@@ -101,12 +105,14 @@ if options.script is not None:
 system.cpu = [CPUClass(cpu_id=i) for i in xrange(options.num_cpus)]
 
 # Create a source clock for the CPUs and set the clock period
-system.cpu_clk_domain = SrcClockDomain(clock = options.cpu_clock)
+system.cpu_clk_domain = SrcClockDomain(clock = options.cpu_clock,
+                                       voltage_domain = system.voltage_domain)
 
 Ruby.create_system(options, system, system.piobus, system._dma_ports)
 
 # Create a seperate clock domain for Ruby
-system.ruby.clk_domain = SrcClockDomain(clock = options.ruby_clock)
+system.ruby.clk_domain = SrcClockDomain(clock = options.ruby_clock,
+                                        voltage_domain = system.voltage_domain)
 
 for (i, cpu) in enumerate(system.cpu):
     #
@@ -129,7 +135,7 @@ for (i, cpu) in enumerate(system.cpu):
 # Create the appropriate memory controllers and connect them to the
 # PIO bus
 system.mem_ctrls = [TestMemClass(range = r) for r in system.mem_ranges]
-for i in xrange(len(system.physmem)):
+for i in xrange(len(system.mem_ctrls)):
     system.mem_ctrls[i].port = system.piobus.master
 
 root = Root(full_system = True, system = system)

diff --git a/configs/example/ruby_network_test.py b/configs/example/ruby_network_test.py
index b6fdc416fb5a2ac00739f9a1f09186726684efe8..5a9764d5aa6e900a16fd5e5e7279cac212e1e42a 100644 (file)
--- a/configs/example/ruby_network_test.py
+++ b/configs/example/ruby_network_test.py
@@ -104,13 +104,20 @@ cpus = [ NetworkTest(fixed_pkts=options.fixed_pkts,
 
 # create the desired simulated system
 system = System(cpu = cpus,
-                physmem = SimpleMemory(),
-                clk_domain = SrcClockDomain(clock = options.sys_clock))
+                physmem = SimpleMemory())
+
+
+# Create a top-level voltage domain and clock domain
+system.voltage_domain = VoltageDomain(voltage = options.sys_voltage)
+
+system.clk_domain = SrcClockDomain(clock = options.sys_clock,
+                                   voltage_domain = system.voltage_domain)
 
 Ruby.create_system(options, system)
 
 # Create a seperate clock domain for Ruby
-system.ruby.clk_domain = SrcClockDomain(clock = options.ruby_clock)
+system.ruby.clk_domain = SrcClockDomain(clock = options.ruby_clock,
+                                        voltage_domain = system.voltage_domain)
 
 i = 0
 for ruby_port in system.ruby._cpu_ruby_ports:

diff --git a/configs/example/ruby_random_test.py b/configs/example/ruby_random_test.py
index cd1b82f168924c070fce3865a9ff76cb2d4354c7..203a4b142c41fe2d7a004c8dce2fbc1eca552f6f 100644 (file)
--- a/configs/example/ruby_random_test.py
+++ b/configs/example/ruby_random_test.py
@@ -97,13 +97,19 @@ tester = RubyTester(check_flush = check_flush,
 # actually used by the rubytester, but is included to support the
 # M5 memory size == Ruby memory size checks
 #
-system = System(tester = tester, physmem = SimpleMemory(),
-                clk_domain = SrcClockDomain(clock = options.sys_clock))
+system = System(tester = tester, physmem = SimpleMemory())
+
+# Create a top-level voltage domain and clock domain
+system.voltage_domain = VoltageDomain(voltage = options.sys_voltage)
+
+system.clk_domain = SrcClockDomain(clock = options.sys_clock,
+                                   voltage_domain = system.voltage_domain)
 
 Ruby.create_system(options, system)
 
 # Create a seperate clock domain for Ruby
-system.ruby.clk_domain = SrcClockDomain(clock = options.ruby_clock)
+system.ruby.clk_domain = SrcClockDomain(clock = options.ruby_clock,
+                                        voltage_domain = system.voltage_domain)
 
 assert(options.num_cpus == len(system.ruby._cpu_ruby_ports))