test_pysvp64dis: test mrr/svm specifiers

diff --git a/src/openpower/sv/trans/test_pysvp64dis.py b/src/openpower/sv/trans/test_pysvp64dis.py
index a373ecb80114fafafc330c9afe436f1c591b8eca..2c290b05c7f33a340d5004972315a5677f929a75 100644 (file)
--- a/src/openpower/sv/trans/test_pysvp64dis.py
+++ b/src/openpower/sv/trans/test_pysvp64dis.py
@@ -204,6 +204,13 @@ class SVSTATETestCase(unittest.TestCase):
                         ]
         self._do_tst(expected)
 
+    def test_12_smr_svmr(self):
+        expected = [
+                    "sv.add./mrr/vec2 *3,*7,*11",
+                    "sv.add./svm/vec4 *3,*7,*11",
+                        ]
+        self._do_tst(expected)
+
 if __name__ == "__main__":
     unittest.main()