Add support for armv7ve to gas.
authorYufeng Zhang <yufeng.zhang@arm.com>
Mon, 18 Nov 2013 17:23:33 +0000 (17:23 +0000)
committerYufeng Zhang <yufeng.zhang@arm.com>
Mon, 18 Nov 2013 17:23:33 +0000 (17:23 +0000)
gas/

* config/tc-arm.c (arm_archs): New armv7ve architecture option.
(arm_cpus): Replace ARM_ARCH_V7A_IDIV_MP_SEC_VIRT with
ARM_ARCH_V7VE for cortex-a7, cortex-a12 and cortex-a15.
(cpu_arch_ver): Likewise.
* doc/c-arm.texi: Document armv7ve.

gas/testsuite/

* gas/arm/attr-march-armv7ve.d: New test case for armv7ve.

include/opcode/

* arm.h (ARM_AEXT_V7VE): New define.
(ARM_ARCH_V7VE): New define.
(ARM_ARCH_V7A_IDIV_MP_SEC_VIRT): Removed.

gas/ChangeLog
gas/config/tc-arm.c
gas/doc/c-arm.texi
gas/testsuite/ChangeLog
gas/testsuite/gas/arm/attr-march-armv7ve.d [new file with mode: 0644]
include/opcode/ChangeLog
include/opcode/arm.h

index da64a285c5a86ab16240cde7cf4cae71f530ccd2..af9b771aab9fa76b9f993c478657cf582e544a4e 100644 (file)
@@ -1,3 +1,11 @@
+2013-11-18  Renlin Li  <Renlin.Li@arm.com>
+
+       * config/tc-arm.c (arm_archs): New armv7ve architecture option.
+       (arm_cpus): Replace ARM_ARCH_V7A_IDIV_MP_SEC_VIRT with
+       ARM_ARCH_V7VE for cortex-a7, cortex-a12 and cortex-a15.
+       (cpu_arch_ver): Likewise.
+       * doc/c-arm.texi: Document armv7ve.
+
 2013-11-18  Zhenqiang Chen  <zhenqiang.chen@linaro.org>
 
        * config/tc-aarch64.c (parse_sys_reg): Support
index f97c3072b420bc029b0b624ec0502bb7d3741148..08b5ea246c3ebd0c9e173372331e813556c046a0 100644 (file)
@@ -23997,8 +23997,7 @@ static const struct arm_cpu_option_table arm_cpus[] =
   ARM_CPU_OPT ("arm1176jzf-s", ARM_ARCH_V6ZK,   FPU_ARCH_VFP_V2, NULL),
   ARM_CPU_OPT ("cortex-a5",    ARM_ARCH_V7A_MP_SEC,
                                                 FPU_NONE,        "Cortex-A5"),
-  ARM_CPU_OPT ("cortex-a7",    ARM_ARCH_V7A_IDIV_MP_SEC_VIRT,
-                                                FPU_ARCH_NEON_VFP_V4,
+  ARM_CPU_OPT ("cortex-a7",    ARM_ARCH_V7VE,   FPU_ARCH_NEON_VFP_V4,
                                                                  "Cortex-A7"),
   ARM_CPU_OPT ("cortex-a8",    ARM_ARCH_V7A_SEC,
                                                 ARM_FEATURE (0, FPU_VFP_V3
@@ -24008,11 +24007,9 @@ static const struct arm_cpu_option_table arm_cpus[] =
                                                 ARM_FEATURE (0, FPU_VFP_V3
                                                        | FPU_NEON_EXT_V1),
                                                                  "Cortex-A9"),
-  ARM_CPU_OPT ("cortex-a12",   ARM_ARCH_V7A_IDIV_MP_SEC_VIRT,
-                                                FPU_ARCH_NEON_VFP_V4,
+  ARM_CPU_OPT ("cortex-a12",   ARM_ARCH_V7VE,   FPU_ARCH_NEON_VFP_V4,
                                                                  "Cortex-A12"),
-  ARM_CPU_OPT ("cortex-a15",   ARM_ARCH_V7A_IDIV_MP_SEC_VIRT,
-                                                FPU_ARCH_NEON_VFP_V4,
+  ARM_CPU_OPT ("cortex-a15",   ARM_ARCH_V7VE,   FPU_ARCH_NEON_VFP_V4,
                                                                  "Cortex-A15"),
   ARM_CPU_OPT ("cortex-a53",    ARM_ARCH_V8A,    FPU_ARCH_CRYPTO_NEON_VFP_ARMV8,
                                                                  "Cortex-A53"),
@@ -24093,6 +24090,7 @@ static const struct arm_arch_option_table arm_archs[] =
   /* The official spelling of the ARMv7 profile variants is the dashed form.
      Accept the non-dashed form for compatibility with old toolchains.  */
   ARM_ARCH_OPT ("armv7a",      ARM_ARCH_V7A,    FPU_ARCH_VFP),
+  ARM_ARCH_OPT ("armv7ve",     ARM_ARCH_V7VE,   FPU_ARCH_VFP),
   ARM_ARCH_OPT ("armv7r",      ARM_ARCH_V7R,    FPU_ARCH_VFP),
   ARM_ARCH_OPT ("armv7m",      ARM_ARCH_V7M,    FPU_ARCH_VFP),
   ARM_ARCH_OPT ("armv7-a",     ARM_ARCH_V7A,    FPU_ARCH_VFP),
@@ -24672,7 +24670,7 @@ static const cpu_arch_ver_table cpu_arch_ver[] =
     {11, ARM_ARCH_V6M},
     {12, ARM_ARCH_V6SM},
     {8, ARM_ARCH_V6T2},
-    {10, ARM_ARCH_V7A_IDIV_MP_SEC_VIRT},
+    {10, ARM_ARCH_V7VE},
     {10, ARM_ARCH_V7R},
     {10, ARM_ARCH_V7M},
     {14, ARM_ARCH_V8A},
index 37756a064ed9ef6ac91f9511b802c3748d4102c2..b4b2d953e68893a3736d87aabfa843d2ba72f237 100644 (file)
@@ -200,6 +200,7 @@ names are recognized:
 @code{armv6s-m},
 @code{armv7},
 @code{armv7-a},
+@code{armv7ve},
 @code{armv7-r},
 @code{armv7-m},
 @code{armv7e-m},
index f2912bb9fccff3b0f0c8370474c88c2300132a22..174ca8eeff89c3ec41ed620f492fb0bb44f01bb7 100644 (file)
@@ -1,7 +1,11 @@
+2013-11-18  Renlin Li  <Renlin.Li@arm.com>
+
+       * gas/arm/attr-march-armv7ve.d: New test case for armv7ve.
+
 2013-11-18  Zhenqiang Chen  <zhenqiang.chen@linaro.org>
 
-       * gas/testsuite/sysreg.s: Add test.
-       * gas/testsuite/sysreg.d: Update.
+       * gas/aarch64/sysreg.s: Add test.
+       * gas/aarch64/sysreg.d: Update.
 
 2013-11-18  Yufeng Zhang  <yufeng.zhang@arm.com>
 
diff --git a/gas/testsuite/gas/arm/attr-march-armv7ve.d b/gas/testsuite/gas/arm/attr-march-armv7ve.d
new file mode 100644 (file)
index 0000000..604183f
--- /dev/null
@@ -0,0 +1,17 @@
+# name: attributes for -march=armv7ve
+# source: blank.s
+# as: -march=armv7ve
+# readelf: -A
+# This test is only valid on EABI based ports.
+# target: *-*-*eabi* *-*-nacl*
+
+Attribute Section: aeabi
+File Attributes
+  Tag_CPU_name: "7VE"
+  Tag_CPU_arch: v7
+  Tag_CPU_arch_profile: Application
+  Tag_ARM_ISA_use: Yes
+  Tag_THUMB_ISA_use: Thumb-2
+  Tag_MPextension_use: Allowed
+  Tag_DIV_use: Allowed in v7-A with integer division extension
+  Tag_Virtualization_use: TrustZone and Virtualization Extensions
index 7e2b9ce8efa062479bde927dc3cc20bec43c20f3..f4d1b0665ab90e94d2ceb569522e8de2b7de3203 100644 (file)
@@ -1,3 +1,9 @@
+2013-11-18  Renlin Li  <Renlin.Li@arm.com>
+
+       * arm.h (ARM_AEXT_V7VE): New define.
+       (ARM_ARCH_V7VE): New define.
+       (ARM_ARCH_V7A_IDIV_MP_SEC_VIRT): Removed.
+
 2013-11-18  Yufeng Zhang  <yufeng.zhang@arm.com>
 
        Revert
index 851fd3c859ef6d51c468e195f1c30ffe5852ec99..b7e4cca237f9671da4c97a1f8d932047b633f967 100644 (file)
 #define ARM_AEXT_V6ZKT2 (ARM_AEXT_V6T2 | ARM_EXT_V6K | ARM_EXT_SEC)
 #define ARM_AEXT_V7_ARM        (ARM_AEXT_V6KT2 | ARM_EXT_V7 | ARM_EXT_BARRIER)
 #define ARM_AEXT_V7A   (ARM_AEXT_V7_ARM | ARM_EXT_V7A)
+#define ARM_AEXT_V7VE  (ARM_AEXT_V7A  | ARM_EXT_DIV | ARM_EXT_ADIV \
+    | ARM_EXT_VIRT | ARM_EXT_SEC | ARM_EXT_MP)
 #define ARM_AEXT_V7R   (ARM_AEXT_V7_ARM | ARM_EXT_V7R | ARM_EXT_DIV)
 #define ARM_AEXT_NOTM \
   (ARM_AEXT_V4 | ARM_EXT_V5ExP | ARM_EXT_V5J | ARM_EXT_V6_NOTM \
 #define ARM_ARCH_V6SM  ARM_FEATURE (ARM_AEXT_V6SM, 0)
 #define ARM_ARCH_V7    ARM_FEATURE (ARM_AEXT_V7, 0)
 #define ARM_ARCH_V7A   ARM_FEATURE (ARM_AEXT_V7A, 0)
+#define ARM_ARCH_V7VE  ARM_FEATURE (ARM_AEXT_V7VE, 0)
 #define ARM_ARCH_V7R   ARM_FEATURE (ARM_AEXT_V7R, 0)
 #define ARM_ARCH_V7M   ARM_FEATURE (ARM_AEXT_V7M, 0)
 #define ARM_ARCH_V7EM  ARM_FEATURE (ARM_AEXT_V7EM, 0)
 #define ARM_ARCH_V7A_MP_SEC \
                        ARM_FEATURE (ARM_AEXT_V7A | ARM_EXT_MP | ARM_EXT_SEC, \
                                     0)
-/* v7-a+idiv+mp+sec+virt.  */
-#define ARM_ARCH_V7A_IDIV_MP_SEC_VIRT \
-                       ARM_FEATURE (ARM_AEXT_V7A | ARM_EXT_MP | ARM_EXT_SEC \
-                                    | ARM_EXT_DIV | ARM_EXT_ADIV \
-                                    | ARM_EXT_VIRT, 0)
 /* v7-r+idiv.  */
 #define ARM_ARCH_V7R_IDIV      ARM_FEATURE (ARM_AEXT_V7R | ARM_EXT_ADIV, 0)
 /* Features that are present in v6M and v6S-M but not other v6 cores.  */