(ashift:SI (match_operand:SI 1 "gpc_reg_operand" "r")
(match_operand:SI 2 "reg_or_cint_operand" "ri")))]
"! TARGET_POWER"
- "slw%I2 %0,%1,%2"
+ "slw%I2 %0,%1,%h2"
[(set_attr "length" "8")])
(define_insn ""
(const_int 0)))
(clobber (match_scratch:SI 3 "=r"))]
"! TARGET_POWER"
- "slw%I2. %3,%1,%2"
+ "slw%I2. %3,%1,%h2"
[(set_attr "type" "delayed_compare")])
(define_insn ""
(set (match_operand:SI 0 "gpc_reg_operand" "=r")
(ashift:SI (match_dup 1) (match_dup 2)))]
"! TARGET_POWER"
- "slw%I2. %0,%1,%2"
+ "slw%I2. %0,%1,%h2"
[(set_attr "type" "delayed_compare")])
(define_insn ""
(lshiftrt:SI (match_operand:SI 1 "gpc_reg_operand" "r")
(match_operand:SI 2 "reg_or_cint_operand" "ri")))]
"! TARGET_POWER"
- "srw%I2 %0,%1,%2")
+ "srw%I2 %0,%1,%h2")
(define_insn ""
[(set (match_operand:CC 0 "cc_reg_operand" "=x,x")
(const_int 0)))
(clobber (match_scratch:SI 3 "=r"))]
"! TARGET_POWER"
- "srw%I2. %3,%1,%2"
+ "srw%I2. %3,%1,%h2"
[(set_attr "type" "delayed_compare")])
(define_insn ""
(set (match_operand:SI 0 "gpc_reg_operand" "=r")
(lshiftrt:SI (match_dup 1) (match_dup 2)))]
"! TARGET_POWER"
- "srw%I2. %0,%1,%2"
+ "srw%I2. %0,%1,%h2"
[(set_attr "type" "delayed_compare")])
(define_insn ""
(ashiftrt:SI (match_operand:SI 1 "gpc_reg_operand" "r")
(match_operand:SI 2 "reg_or_cint_operand" "ri")))]
"! TARGET_POWER"
- "sraw%I2 %0,%1,%2")
+ "sraw%I2 %0,%1,%h2")
(define_insn ""
[(set (match_operand:CC 0 "cc_reg_operand" "=x,x")
(const_int 0)))
(clobber (match_scratch:SI 3 "=r"))]
"! TARGET_POWER"
- "sraw%I2. %3,%1,%2"
+ "sraw%I2. %3,%1,%h2"
[(set_attr "type" "delayed_compare")])
(define_insn ""
(set (match_operand:SI 0 "gpc_reg_operand" "=r")
(ashiftrt:SI (match_dup 1) (match_dup 2)))]
"! TARGET_POWER"
- "sraw%I2. %0,%1,%2"
+ "sraw%I2. %0,%1,%h2"
[(set_attr "type" "delayed_compare")])
\f
;; Floating-point insns, excluding normal data motion.