Add warnings for driver-driver conflicts between FFs (and other cells) and constants

diff --git a/passes/opt/opt_clean.cc b/passes/opt/opt_clean.cc
index 2d2ffa9a15faac1c347e35f283c302fb895bbd61..25d462ada760d4e5c5d2ca36fcd8d0483179c3e4 100644 (file)
--- a/passes/opt/opt_clean.cc
+++ b/passes/opt/opt_clean.cc
@@ -91,9 +91,16 @@ void rmunused_module_cells(Module *module, bool verbose)
                Cell *cell = it.second;
                for (auto &it2 : cell->connections()) {
                        if (!ct_all.cell_known(cell->type) || ct_all.cell_output(cell->type, it2.first))
-                               for (auto bit : sigmap(it2.second))
+                               for (auto raw_bit : it2.second) {
+                                       if (raw_bit.wire == nullptr)
+                                               continue;
+                                       auto bit = sigmap(raw_bit);
+                                       if (bit.wire == nullptr)
+                                               log_warning("Driver-driver conflict for %s between cell %s.%s and constant %s in %s: Resolved using constant.\n",
+                                                               log_signal(raw_bit), log_id(cell), log_id(it2.first), log_signal(bit), log_id(module));
                                        if (bit.wire != nullptr)
                                                wire2driver[bit].insert(cell);
+                               }
                }
                if (keep_cache.query(cell))
                        queue.insert(cell);

diff --git a/passes/proc/proc_dff.cc b/passes/proc/proc_dff.cc
index 98653dc6bbd73bac54ce516e41382ade8fbb1aba..f732baa17b5bb44830171a456920c85e47fb8c05 100644 (file)
--- a/passes/proc/proc_dff.cc
+++ b/passes/proc/proc_dff.cc
@@ -322,6 +322,7 @@ void proc_dff(RTLIL::Module *mod, RTLIL::Process *proc, ConstEval &ce)
                        }
                }
 
+               SigSpec sig_q = sig;
                ce.assign_map.apply(insig);
                ce.assign_map.apply(rstval);
                ce.assign_map.apply(sig);
@@ -350,13 +351,13 @@ void proc_dff(RTLIL::Module *mod, RTLIL::Process *proc, ConstEval &ce)
                else if (!rstval.is_fully_const() && !ce.eval(rstval))
                {
                        log_warning("Async reset value `%s' is not constant!\n", log_signal(rstval));
-                       gen_dffsr(mod, insig, rstval, sig,
+                       gen_dffsr(mod, insig, rstval, sig_q,
                                        sync_edge->type == RTLIL::SyncType::STp,
                                        sync_level && sync_level->type == RTLIL::SyncType::ST1,
                                        sync_edge->signal, sync_level->signal, proc);
                }
                else
-                       gen_dff(mod, insig, rstval.as_const(), sig,
+                       gen_dff(mod, insig, rstval.as_const(), sig_q,
                                        sync_edge && sync_edge->type == RTLIL::SyncType::STp,
                                        sync_level && sync_level->type == RTLIL::SyncType::ST1,
                                        sync_edge ? sync_edge->signal : SigSpec(),