BRW_OPCODE_MSAVE = 44, /**< Pre-Gen6 */
BRW_OPCODE_MRESTORE = 45, /**< Pre-Gen6 */
BRW_OPCODE_PUSH = 46, /**< Pre-Gen6 */
+ BRW_OPCODE_GOTO = 46, /**< Gen8+ */
BRW_OPCODE_POP = 47, /**< Pre-Gen6 */
BRW_OPCODE_WAIT = 48,
BRW_OPCODE_SEND = 49,
opcode == BRW_OPCODE_HALT;
}
+static bool
+has_branch_ctrl(struct brw_context *brw, enum opcode opcode)
+{
+ if (brw->gen < 8)
+ return false;
+
+ return opcode == BRW_OPCODE_IF ||
+ opcode == BRW_OPCODE_ELSE ||
+ opcode == BRW_OPCODE_GOTO;
+}
+
static bool
is_logic_instruction(unsigned opcode)
{
[1] = "AccWrEnable"
};
+static const char *const branch_ctrl[2] = {
+ [0] = "",
+ [1] = "BranchCtrl"
+};
+
static const char *const wectrl[2] = {
[0] = "",
[1] = "WE_all"
err |= control(file, "compaction", cmpt_ctrl, is_compacted, &space);
err |= control(file, "thread control", thread_ctrl,
brw_inst_thread_control(brw, inst), &space);
- if (brw->gen >= 6)
+ if (has_branch_ctrl(brw, opcode)) {
+ err |= control(file, "branch ctrl", branch_ctrl,
+ brw_inst_branch_control(brw, inst), &space);
+ } else if (brw->gen >= 6) {
err |= control(file, "acc write control", accwr,
brw_inst_acc_wr_control(brw, inst), &space);
+ }
if (opcode == BRW_OPCODE_SEND || opcode == BRW_OPCODE_SENDC)
err |= control(file, "end of thread", end_of_thread,
brw_inst_eot(brw, inst), &space);
/* 8: */ 33, 33)
F8(flag_subreg_nr, /* 4+ */ 89, 89, /* 8+ */ 32, 32)
F(saturate, 31, 31)
-FC(branch_control, 30, 30, brw->gen >= 8)
F(debug_control, 30, 30)
F(cmpt_control, 29, 29)
+FC(branch_control, 28, 28, brw->gen >= 8)
F(acc_wr_control, 28, 28)
F(cond_modifier, 27, 24)
FC(math_function, 27, 24, brw->gen >= 6)