uint32_t num_tcc_blocks;
uint32_t max_se; /* shader engines */
uint32_t max_sh_per_se; /* shader arrays per shader engine */
+ uint32_t max_wave64_per_simd;
/* Render backends (color + depth blocks). */
uint32_t r300_num_gb_pipes;
unsigned max_waves_per_sh,
unsigned threadgroups_per_cu);
-static inline unsigned ac_get_max_wave64_per_simd(enum radeon_family family)
-{
-
- switch (family) {
- /* These always have 8 waves: */
- case CHIP_POLARIS10:
- case CHIP_POLARIS11:
- case CHIP_POLARIS12:
- case CHIP_VEGAM:
- return 8;
- default:
- return 10;
- }
-}
-
static inline unsigned ac_get_num_physical_vgprs(enum chip_class chip_class,
unsigned wave_size)
{
* of Wave32, which is double the number for Wave64.
*/
if (info->chip_class >= GFX10)
- return 128 * ac_get_max_wave64_per_simd(info->family) * 2;
+ return 128 * info->max_wave64_per_simd * 2;
return info->chip_class >= GFX8 ? 800 : 512;
}
unsigned max_simd_waves;
unsigned lds_per_wave = 0;
- max_simd_waves = ac_get_max_wave64_per_simd(device->physical_device->rad_info.family);
+ max_simd_waves = device->physical_device->rad_info.max_wave64_per_simd;
if (stage == MESA_SHADER_FRAGMENT) {
lds_per_wave = conf->lds_size * lds_increment +
unsigned lds_per_wave = 0;
unsigned max_simd_waves;
- max_simd_waves = ac_get_max_wave64_per_simd(sscreen->info.family);
+ max_simd_waves = sscreen->info.max_wave64_per_simd;
/* Compute LDS usage for PS. */
switch (shader->selector->type) {