svga: fix use of provoking vertex control

If the SVGA3D_DEVCAP_DX_PROVOKING_VERTEX query returns false, never
define rasterizer state objects with provokingVertexLast set.  Despite
what the device reports, it may interpret the provokingVertexLast flag
anyway.  This fixes an issue when using capability clamping.

Tested with piglit provoking-vertex and glsl-fs-flat-color tests.

VMware bug 1550143.

Reviewed-by: <charmainel@vmware.com>

diff --git a/src/gallium/drivers/svga/svga_pipe_rasterizer.c b/src/gallium/drivers/svga/svga_pipe_rasterizer.c
index b01b04c2cfc159e3da6100766d2fdc3d62de18dd..569fbe16f677fb9aa3ac15cc2b59a0fe95fa3371 100644 (file)
--- a/src/gallium/drivers/svga/svga_pipe_rasterizer.c
+++ b/src/gallium/drivers/svga/svga_pipe_rasterizer.c
@@ -105,6 +105,7 @@ static void
 define_rasterizer_object(struct svga_context *svga,
                          struct svga_rasterizer_state *rast)
 {
+   struct svga_screen *svgascreen = svga_screen(svga->pipe.screen);
    unsigned fill_mode = translate_fill_mode(rast->templ.fill_front);
    unsigned cull_mode = translate_cull_mode(rast->templ.cull_face);
    int depth_bias = rast->templ.offset_units;
@@ -129,6 +130,8 @@ define_rasterizer_object(struct svga_context *svga,
    }
 
    for (try = 0; try < 2; try++) {
+      const uint8 pv_last = !rast->templ.flatshade_first &&
+         svgascreen->haveProvokingVertex;
       enum pipe_error ret =
          SVGA3D_vgpu10_DefineRasterizerState(svga->swc,
                                              rast->id,
@@ -146,7 +149,7 @@ define_rasterizer_object(struct svga_context *svga,
                                              rast->templ.line_stipple_enable,
                                              line_factor,
                                              line_pattern,
-                                             !rast->templ.flatshade_first);
+                                             pv_last);
       if (ret == PIPE_OK)
          return;
       svga_context_flush(svga, NULL);