(no commit message)

diff --git a/openpower/sv/mv.swizzle.mdwn b/openpower/sv/mv.swizzle.mdwn
index 75cc582d28caacfabd3cb047f0e9cfb178ffcde2..9a09735ed7a969747d5a4507d883ba5bc6919c85 100644 (file)
--- a/openpower/sv/mv.swizzle.mdwn
+++ b/openpower/sv/mv.swizzle.mdwn
@@ -276,22 +276,22 @@ For a separate source/dest SUBVL (again, no elwidth overrides):
         if outer:
             for j in range(dst_subvl):
                 for i in range(VL):
-                    ....
+                    yield j*VL+i
         else:
             for i in range(VL):
                 for j in range(dst_subvl):
-                    ....
+                    yield i*dst_subvl+j
 
     # yield an outer-SUBVL or inner VL loop with SUBVL
     def index_src(outer):
         if outer:
             for j in range(SUBVL):
                 for i in range(VL):
-                    ....
+                    yield j*VL+i
         else:
             for i in range(VL):
                 for j in range(SUBVL):
-                    ....
+                    yield i*SUBVL+j
 ```
 
 "yield" from python is used here for simplicity and clarity.