bios/sdram: use burstdet detection for ECP5DDRPHY init
authorFlorent Kermarrec <florent@enjoy-digital.fr>
Tue, 5 Mar 2019 11:26:10 +0000 (12:26 +0100)
committerFlorent Kermarrec <florent@enjoy-digital.fr>
Tue, 5 Mar 2019 12:27:06 +0000 (13:27 +0100)
litex/soc/software/bios/sdram.c

index 401b73ffba8a7f0a875f05c0fe81065365467f2e..4ffb108eea09c321c389d46f63b0ab2feb8a4e56 100644 (file)
@@ -210,13 +210,14 @@ void sdrwr(char *startaddr)
 
 #if defined (USDDRPHY)
 #define ERR_DDRPHY_DELAY 512
+#define ERR_DDRPHY_BITSLIP DFII_NPHASES*2
 #elif defined (ECP5DDRPHY)
 #define ERR_DDRPHY_DELAY 8
+#define ERR_DDRPHY_BITSLIP 1
 #else
 #define ERR_DDRPHY_DELAY 32
-#endif
-
 #define ERR_DDRPHY_BITSLIP DFII_NPHASES*2
+#endif
 
 #define NBMODULES DFII_PIX_DATA_SIZE*DFII_NPHASES/8
 
@@ -461,6 +462,9 @@ static int read_level_scan(int module, int bitslip)
                int show = 1;
 #ifdef USDDRPHY
                show = (j%16 == 0);
+#endif
+#ifdef ECP5DDRPHY
+               ddrphy_burstdet_clr_write(1);
 #endif
                command_prd(DFII_COMMAND_CAS|DFII_COMMAND_CS|DFII_COMMAND_RDDATA);
                cdelay(15);
@@ -471,6 +475,10 @@ static int read_level_scan(int module, int bitslip)
                        if(MMPTR(sdram_dfii_pix_rddata_addr[p]+4*(2*NBMODULES-module-1)) != prs[DFII_PIX_DATA_SIZE*p+2*NBMODULES-module-1])
                                working = 0;
                }
+#ifdef ECP5DDRPHY
+               if (((ddrphy_burstdet_seen_read() >> module) & 0x1) != 1)
+                       working = 0;
+#endif
                if (show)
                        printf("%d", working);
                score += working;
@@ -526,6 +534,9 @@ static void read_level(int module)
        delay = 0;
        read_delay_rst(module);
        while(1) {
+#ifdef ECP5DDRPHY
+               ddrphy_burstdet_clr_write(1);
+#endif
                command_prd(DFII_COMMAND_CAS|DFII_COMMAND_CS|DFII_COMMAND_RDDATA);
                cdelay(15);
                working = 1;
@@ -535,6 +546,10 @@ static void read_level(int module)
                        if(MMPTR(sdram_dfii_pix_rddata_addr[p]+4*(2*NBMODULES-module-1)) != prs[DFII_PIX_DATA_SIZE*p+2*NBMODULES-module-1])
                                working = 0;
                }
+#ifdef ECP5DDRPHY
+               if (((ddrphy_burstdet_seen_read() >> module) & 0x1) != 1)
+                       working = 0;
+#endif
                if(working)
                        break;
                delay++;
@@ -557,6 +572,9 @@ static void read_level(int module)
 
        /* Find largest working delay */
        while(1) {
+#ifdef ECP5DDRPHY
+               ddrphy_burstdet_clr_write(1);
+#endif
                command_prd(DFII_COMMAND_CAS|DFII_COMMAND_CS|DFII_COMMAND_RDDATA);
                cdelay(15);
                working = 1;
@@ -566,6 +584,10 @@ static void read_level(int module)
                        if(MMPTR(sdram_dfii_pix_rddata_addr[p]+4*(2*NBMODULES-module-1)) != prs[DFII_PIX_DATA_SIZE*p+2*NBMODULES-module-1])
                                working = 0;
                }
+#ifdef ECP5DDRPHY
+               if (((ddrphy_burstdet_seen_read() >> module) & 0x1) != 1)
+                       working = 0;
+#endif
                if(!working)
                        break;
                delay++;