#if defined (USDDRPHY)
#define ERR_DDRPHY_DELAY 512
+#define ERR_DDRPHY_BITSLIP DFII_NPHASES*2
#elif defined (ECP5DDRPHY)
#define ERR_DDRPHY_DELAY 8
+#define ERR_DDRPHY_BITSLIP 1
#else
#define ERR_DDRPHY_DELAY 32
-#endif
-
#define ERR_DDRPHY_BITSLIP DFII_NPHASES*2
+#endif
#define NBMODULES DFII_PIX_DATA_SIZE*DFII_NPHASES/8
int show = 1;
#ifdef USDDRPHY
show = (j%16 == 0);
+#endif
+#ifdef ECP5DDRPHY
+ ddrphy_burstdet_clr_write(1);
#endif
command_prd(DFII_COMMAND_CAS|DFII_COMMAND_CS|DFII_COMMAND_RDDATA);
cdelay(15);
if(MMPTR(sdram_dfii_pix_rddata_addr[p]+4*(2*NBMODULES-module-1)) != prs[DFII_PIX_DATA_SIZE*p+2*NBMODULES-module-1])
working = 0;
}
+#ifdef ECP5DDRPHY
+ if (((ddrphy_burstdet_seen_read() >> module) & 0x1) != 1)
+ working = 0;
+#endif
if (show)
printf("%d", working);
score += working;
delay = 0;
read_delay_rst(module);
while(1) {
+#ifdef ECP5DDRPHY
+ ddrphy_burstdet_clr_write(1);
+#endif
command_prd(DFII_COMMAND_CAS|DFII_COMMAND_CS|DFII_COMMAND_RDDATA);
cdelay(15);
working = 1;
if(MMPTR(sdram_dfii_pix_rddata_addr[p]+4*(2*NBMODULES-module-1)) != prs[DFII_PIX_DATA_SIZE*p+2*NBMODULES-module-1])
working = 0;
}
+#ifdef ECP5DDRPHY
+ if (((ddrphy_burstdet_seen_read() >> module) & 0x1) != 1)
+ working = 0;
+#endif
if(working)
break;
delay++;
/* Find largest working delay */
while(1) {
+#ifdef ECP5DDRPHY
+ ddrphy_burstdet_clr_write(1);
+#endif
command_prd(DFII_COMMAND_CAS|DFII_COMMAND_CS|DFII_COMMAND_RDDATA);
cdelay(15);
working = 1;
if(MMPTR(sdram_dfii_pix_rddata_addr[p]+4*(2*NBMODULES-module-1)) != prs[DFII_PIX_DATA_SIZE*p+2*NBMODULES-module-1])
working = 0;
}
+#ifdef ECP5DDRPHY
+ if (((ddrphy_burstdet_seen_read() >> module) & 0x1) != 1)
+ working = 0;
+#endif
if(!working)
break;
delay++;