re PR testsuite/65526 (testsuite checks for arm vectorization support on non-arm...

PR testsuite/65526
* lib/target-supports.exp (check_effective_target_arm32): Fail early
when target isn't arm*-*-*-*.
(check_effective_target_arm_nothumb): Likewise.
(check_effective_target_arm_little_endian): Likewise.
(check_effective_target_arm_vect_no_misalign): Likewise.
(check_effective_target_aarch64_little_endian): Fail early if target
isn't aarch64*-*-*.

From-SVN: r221677

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 92e09887302a66ec4d9e7aec96e803cb4466c2f6..06ce8761f1c10b2bbf1be4ddc6d61fc23d48020a 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,14 @@
+2015-03-25  Martin Sebor  <msebor@redhat.com>
+
+       PR testsuite/65526
+       * lib/target-supports.exp (check_effective_target_arm32): Fail early
+       when target isn't arm*-*-*-*.
+       (check_effective_target_arm_nothumb): Likewise.
+       (check_effective_target_arm_little_endian): Likewise.
+       (check_effective_target_arm_vect_no_misalign): Likewise.
+       (check_effective_target_aarch64_little_endian): Fail early if target
+       isn't aarch64*-*-*.
+
 2015-03-25  Sebastian Pop  <s.pop@samsung.com>
 
        PR tree-optimization/65177

diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp
index b57f545fce55a6d825388e761fe46b174e28170a..f632d00832f07816b832716988e0f32acd932782 100644 (file)
--- a/gcc/testsuite/lib/target-supports.exp
+++ b/gcc/testsuite/lib/target-supports.exp
@@ -2373,6 +2373,10 @@ proc check_effective_target_aarch64_big_endian { } {
 
 # Return 1 if this is a AArch64 target supporting little endian
 proc check_effective_target_aarch64_little_endian { } {
+    if { ![istarget aarch64*-*-*] } {
+       return 0
+    }
+
     return [check_no_compiler_messages aarch64_little_endian assembly {
         #if !defined(__aarch64__) || defined(__AARCH64EB__)
         #error FOO
@@ -2382,6 +2386,10 @@ proc check_effective_target_aarch64_little_endian { } {
 
 # Return 1 if this is an arm target using 32-bit instructions
 proc check_effective_target_arm32 { } {
+    if { ![istarget arm*-*-*] } {
+       return 0
+    }
+
     return [check_no_compiler_messages arm32 assembly {
        #if !defined(__arm__) || (defined(__thumb__) && !defined(__thumb2__))
        #error !__arm || __thumb__ && !__thumb2__
@@ -2391,6 +2399,10 @@ proc check_effective_target_arm32 { } {
 
 # Return 1 if this is an arm target not using Thumb
 proc check_effective_target_arm_nothumb { } {
+    if { ![istarget arm*-*-*] } {
+       return 0
+    }
+
     return [check_no_compiler_messages arm_nothumb assembly {
        #if !defined(__arm__) || (defined(__thumb__) || defined(__thumb2__))
        #error !__arm__ || __thumb || __thumb2__
@@ -2400,6 +2412,10 @@ proc check_effective_target_arm_nothumb { } {
 
 # Return 1 if this is a little-endian ARM target
 proc check_effective_target_arm_little_endian { } {
+    if { ![istarget arm*-*-*] } {
+       return 0
+    }
+
     return [check_no_compiler_messages arm_little_endian assembly {
        #if !defined(__arm__) || !defined(__ARMEL__)
        #error !__arm__ || !__ARMEL__
@@ -2409,6 +2425,10 @@ proc check_effective_target_arm_little_endian { } {
 
 # Return 1 if this is an ARM target that only supports aligned vector accesses
 proc check_effective_target_arm_vect_no_misalign { } {
+    if { ![istarget arm*-*-*] } {
+       return 0
+    }
+
     return [check_no_compiler_messages arm_vect_no_misalign assembly {
        #if !defined(__arm__) \
            || (defined(__ARM_FEATURE_UNALIGNED) \