don't ignore data value when writing MIPI

diff --git a/riscv/processor.cc b/riscv/processor.cc
index 3206ed0a91676912c529a2240445d3442c98110b..8347b9df185f56115d26b85bcd5b644f50995bb9 100644 (file)
--- a/riscv/processor.cc
+++ b/riscv/processor.cc
@@ -329,7 +329,7 @@ void processor_t::set_csr(int which, reg_t val)
       break;
     }
     case CSR_MIPI: {
-      state.mip |= MIP_MSIP;
+      state.mip = set_field(state.mip, MIP_MSIP, val & 1);
       break;
     }
     case CSR_MIE: {