cpu: Avoid duplicate entries in tracking structures for writes to misc regs

setMiscReg currently makes a new entry for each write to a misc reg without
checking for duplicates, this can cause a triggering of the assert if an
instruction get replayed and writes to the same misc regs multiple times.
This fix prevents duplicate entries and instead updates the value.

diff --git a/src/cpu/o3/dyn_inst.hh b/src/cpu/o3/dyn_inst.hh
index c8cdf7a1fe4b6ddd01a1de413cb46bc4a4327277..082c1f5d4f4f888b99d25f6f16a5fd7d39ae4e13 100644 (file)
--- a/src/cpu/o3/dyn_inst.hh
+++ b/src/cpu/o3/dyn_inst.hh
@@ -149,8 +149,18 @@ class BaseO3DynInst : public BaseDynInst<Impl>
     void setMiscReg(int misc_reg, const MiscReg &val)
     {
         /** Writes to misc. registers are recorded and deferred until the
-         * commit stage, when updateMiscRegs() is called.
+         * commit stage, when updateMiscRegs() is called. First, check if
+         * the misc reg has been written before and update its value to be
+         * committed instead of making a new entry. If not, make a new
+         * entry and record the write.
          */
+        for (int idx = 0; idx < _numDestMiscRegs; idx++) {
+            if (_destMiscRegIdx[idx] == misc_reg) {
+               _destMiscRegVal[idx] = val;
+               return;
+            }
+        }
+
         assert(_numDestMiscRegs < TheISA::MaxMiscDestRegs);
         _destMiscRegIdx[_numDestMiscRegs] = misc_reg;
         _destMiscRegVal[_numDestMiscRegs] = val;