reg-stack.c (subst_stack_regs_pat): Swap operands in commutative operations when...

	* reg-stack.c (subst_stack_regs_pat): Swap operands in commutative
	operations when needed.
	* i386.md (fop_?f_comm): New.
	(fop_?f_1): Do not accept commutative operands.

From-SVN: r30664

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 9cbb8291caa4f5785f14a0eb7bb96159d6dbceb6..17119fba470de8926ca3737bdff37978bd260d8b 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,10 @@
+Wed Nov 24 17:08:09 MET 1999  Jan Hubicka  <hubicka@freesoft.cz>
+
+       * reg-stack.c (subst_stack_regs_pat): Swap operands in commutative
+       operations when needed.
+       * i386.md (fop_?f_comm): New.
+       (fop_?f_1): Do not accept commutative operands.
+
 1999-11-25  Andreas Jaeger  <aj@suse.de>
 
        * config/mips/mips.md (casesi_internal): Add missing brace.

diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index 5f595e469e60d1e2dd214783e145ccdb68ad6168..e7f9a140b72ea5e79062fefeec17500108200674 100644 (file)
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -7272,12 +7272,51 @@
 ;; SImode if the target mode DFmode, but only SImode if the target mode
 ;; is SFmode.
 
+;; Gcc is slightly more smart about handling normal two address instructions
+;; so use special patterns for add and mull.
+(define_insn "*fop_sf_comm"
+  [(set (match_operand:SF 0 "register_operand" "=f")
+       (match_operator:SF 3 "binary_fp_operator"
+                       [(match_operand:SF 1 "register_operand" "%0")
+                        (match_operand:SF 2 "nonimmediate_operand" "fm")]))]
+  "TARGET_80387 && GET_RTX_CLASS (GET_CODE (operands[3])) == 'c'"
+  "* return output_387_binary_op (insn, operands);"
+  [(set (attr "type") 
+        (if_then_else (match_operand:SF 3 "mult_operator" "") 
+           (const_string "fmul")
+           (const_string "fop")))])
+
+(define_insn "*fop_df_comm"
+  [(set (match_operand:DF 0 "register_operand" "=f")
+       (match_operator:DF 3 "binary_fp_operator"
+                       [(match_operand:DF 1 "register_operand" "%0")
+                        (match_operand:DF 2 "nonimmediate_operand" "fm")]))]
+  "TARGET_80387 && GET_RTX_CLASS (GET_CODE (operands[3])) == 'c'"
+  "* return output_387_binary_op (insn, operands);"
+  [(set (attr "type") 
+        (if_then_else (match_operand:DF 3 "mult_operator" "") 
+           (const_string "fmul")
+           (const_string "fop")))])
+
+(define_insn "*fop_xf_comm"
+  [(set (match_operand:XF 0 "register_operand" "=f")
+       (match_operator:XF 3 "binary_fp_operator"
+                       [(match_operand:XF 1 "register_operand" "%0")
+                        (match_operand:XF 2 "register_operand" "f")]))]
+  "TARGET_80387 && GET_RTX_CLASS (GET_CODE (operands[3])) == 'c'"
+  "* return output_387_binary_op (insn, operands);"
+  [(set (attr "type") 
+        (if_then_else (match_operand:XF 3 "mult_operator" "") 
+           (const_string "fmul")
+           (const_string "fop")))])
+
 (define_insn "*fop_sf_1"
   [(set (match_operand:SF 0 "register_operand" "=f,f")
        (match_operator:SF 3 "binary_fp_operator"
                        [(match_operand:SF 1 "nonimmediate_operand" "0,fm")
                         (match_operand:SF 2 "nonimmediate_operand" "fm,0")]))]
   "TARGET_80387
+   && GET_RTX_CLASS (GET_CODE (operands[3])) != 'c'
    && (GET_CODE (operands[1]) != MEM || GET_CODE (operands[2]) != MEM)"
   "* return output_387_binary_op (insn, operands);"
   [(set (attr "type") 
@@ -7328,6 +7367,7 @@
                        [(match_operand:DF 1 "nonimmediate_operand" "0,fm")
                         (match_operand:DF 2 "nonimmediate_operand" "fm,0")]))]
   "TARGET_80387
+   && GET_RTX_CLASS (GET_CODE (operands[3])) != 'c'
    && (GET_CODE (operands[1]) != MEM || GET_CODE (operands[2]) != MEM)"
   "* return output_387_binary_op (insn, operands);"
   [(set (attr "type") 
@@ -7409,7 +7449,8 @@
        (match_operator:XF 3 "binary_fp_operator"
                        [(match_operand:XF 1 "register_operand" "0,f")
                         (match_operand:XF 2 "register_operand" "f,0")]))]
-  "TARGET_80387"
+  "TARGET_80387
+   && GET_RTX_CLASS (GET_CODE (operands[3])) != 'c'"
   "* return output_387_binary_op (insn, operands);"
   [(set (attr "type") 
         (cond [(match_operand:XF 3 "mult_operator" "") 

diff --git a/gcc/reg-stack.c b/gcc/reg-stack.c
index 98b877867455f5b945aeef5c474c83527bc15411..aa2b01010f6ba445177ce96d17c08115562ba028 100644 (file)
--- a/gcc/reg-stack.c
+++ b/gcc/reg-stack.c
@@ -1631,6 +1631,16 @@ subst_stack_regs_pat (insn, regstack, pat)
                SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
                replace_reg (dest, get_hard_regnum (regstack, *dest));
              }
+
+           /* Keep operand 1 maching with destination.  */
+           if (GET_RTX_CLASS (GET_CODE (pat_src)) == 'c'
+               && REG_P (*src1) && REG_P (*src2)
+               && REGNO (*src1) != REGNO (*dest))
+            {
+               rtx tmp = *src1;
+               *src1 = *src2;
+               *src2 = tmp;
+            }
            break;
 
          case UNSPEC: