radeonsi/gfx10: fix tessellation for the legacy pipeline

ported from PAL

Acked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>

diff --git a/src/gallium/drivers/radeonsi/si_state_shaders.c b/src/gallium/drivers/radeonsi/si_state_shaders.c
index c9800c00b258e5796c43606373cb9e1293d15e2a..22c54d32e9f8a60b5c9aab625081895e6a89c30d 100644 (file)
--- a/src/gallium/drivers/radeonsi/si_state_shaders.c
+++ b/src/gallium/drivers/radeonsi/si_state_shaders.c
@@ -1308,6 +1308,16 @@ static void si_emit_shader_vs(struct si_context *sctx)
 
        if (initial_cdw != sctx->gfx_cs->current.cdw)
                sctx->context_roll = true;
+
+       /* Required programming for tessellation. (legacy pipeline only) */
+       if (sctx->chip_class == GFX10 &&
+           shader->selector->type == PIPE_SHADER_TESS_EVAL) {
+               radeon_opt_set_context_reg(sctx, R_028A44_VGT_GS_ONCHIP_CNTL,
+                                          SI_TRACKED_VGT_GS_ONCHIP_CNTL,
+                                          S_028A44_ES_VERTS_PER_SUBGRP(250) |
+                                          S_028A44_GS_PRIMS_PER_SUBGRP(126) |
+                                          S_028A44_GS_INST_PRIMS_IN_SUBGRP(126));
+       }
 }
 
 /**