Added multi-dim memory test (requires iverilog git head)

diff --git a/tests/simple/memory.v b/tests/simple/memory.v
index 9fed1bf3ba9c7e2a3e1f3a0af959f34676db6e53..db06c56d29df2670e9e1e359d02097787068e394 100644 (file)
--- a/tests/simple/memory.v
+++ b/tests/simple/memory.v
@@ -194,3 +194,14 @@ always @(posedge clk) begin
 end
 
 endmodule
+
+// ----------------------------------------------------------
+
+module memtest08(input clk, input [3:0] a, b, c, output reg [3:0] y);
+       reg [3:0] mem [0:15] [0:15];
+       always @(posedge clk) begin
+               y <= mem[a][b];
+               mem[a][b] <= c;
+       end
+endmodule
+