spirv: Add support for MinLod

Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>

diff --git a/src/compiler/nir/nir.h b/src/compiler/nir/nir.h
index fd1077fe37da77f0ab924f9a8e35d2718900edfb..376211d5e74db8ff88a25b852b0274e3767ffab1 100644 (file)
--- a/src/compiler/nir/nir.h
+++ b/src/compiler/nir/nir.h
@@ -1398,6 +1398,7 @@ typedef enum {
    nir_tex_src_offset,
    nir_tex_src_bias,
    nir_tex_src_lod,
+   nir_tex_src_min_lod,
    nir_tex_src_ms_index, /* MSAA sample index */
    nir_tex_src_ms_mcs, /* MSAA compression value */
    nir_tex_src_ddx,

diff --git a/src/compiler/nir/nir_print.c b/src/compiler/nir/nir_print.c
index 7124ff09e825fabfe62fa8c965b7cdb82c360e4e..920008468a688f3208aaab6d0ff07a9991ec450e 100644 (file)
--- a/src/compiler/nir/nir_print.c
+++ b/src/compiler/nir/nir_print.c
@@ -846,6 +846,9 @@ print_tex_instr(nir_tex_instr *instr, print_state *state)
       case nir_tex_src_lod:
          fprintf(fp, "(lod)");
          break;
+      case nir_tex_src_min_lod:
+         fprintf(fp, "(min_lod)");
+         break;
       case nir_tex_src_ms_index:
          fprintf(fp, "(ms_index)");
          break;

diff --git a/src/compiler/shader_info.h b/src/compiler/shader_info.h
index b95cc310fd61ffea0177763b555ca56949f0da5a..b21db3e60f0aa9e4d47c11af0f96b9e057fd4452 100644 (file)
--- a/src/compiler/shader_info.h
+++ b/src/compiler/shader_info.h
@@ -41,6 +41,7 @@ struct spirv_supported_capabilities {
    bool image_read_without_format;
    bool image_write_without_format;
    bool int64;
+   bool min_lod;
    bool multiview;
    bool variable_pointers;
    bool storage_16bit;

diff --git a/src/compiler/spirv/spirv_to_nir.c b/src/compiler/spirv/spirv_to_nir.c
index 22efaa276d94d0c7df2d8f9e97b716d8c48d093e..4679fd323e667a659be1f43585277794b457265b 100644 (file)
--- a/src/compiler/spirv/spirv_to_nir.c
+++ b/src/compiler/spirv/spirv_to_nir.c
@@ -2174,6 +2174,13 @@ vtn_handle_texture(struct vtn_builder *b, SpvOp opcode,
          texop = nir_texop_txf_ms;
          (*p++) = vtn_tex_src(b, w[idx++], nir_tex_src_ms_index);
       }
+
+      if (operands & SpvImageOperandsMinLodMask) {
+         vtn_assert(texop == nir_texop_tex ||
+                    texop == nir_texop_txb ||
+                    texop == nir_texop_txd);
+         (*p++) = vtn_tex_src(b, w[idx++], nir_tex_src_min_lod);
+      }
    }
    /* We should have now consumed exactly all of the arguments */
    vtn_assert(idx == count);
@@ -3419,11 +3426,14 @@ vtn_handle_preamble_instruction(struct vtn_builder *b, SpvOp opcode,
       case SpvCapabilityStorageImageMultisample:
       case SpvCapabilityInt8:
       case SpvCapabilitySparseResidency:
-      case SpvCapabilityMinLod:
          vtn_warn("Unsupported SPIR-V capability: %s",
                   spirv_capability_to_string(cap));
          break;
 
+      case SpvCapabilityMinLod:
+         spv_check_supported(min_lod, cap);
+         break;
+
       case SpvCapabilityAtomicStorage:
          spv_check_supported(atomic_storage, cap);
          break;