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Update IPI test to work with new mechanism
author
Andrew Waterman
<waterman@cs.berkeley.edu>
Mon, 16 Nov 2015 22:16:05 +0000
(14:16 -0800)
committer
Andrew Waterman
<waterman@cs.berkeley.edu>
Mon, 16 Nov 2015 22:16:05 +0000
(14:16 -0800)
isa/rv64mi/ipi.S
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diff --git
a/isa/rv64mi/ipi.S
b/isa/rv64mi/ipi.S
index 457a9cda5c924e4e00efe2131f9d84f945c3adfd..a427b765664dc18171d66c37705808413146a112 100644
(file)
--- a/
isa/rv64mi/ipi.S
+++ b/
isa/rv64mi/ipi.S
@@
-26,30
+26,16
@@
RVTEST_CODE_BEGIN
1:li a3, 1
bgeu a2, a3, 1b
- # wait for all cores to boot
- 1: lw a1, (a0)
- bltu a1, a3, 1b
-
- # IPI dominoes
- csrr a0, mhartid
- 1: bnez a0, 1b
- add a0, a0, 1
- rem a0, a0, a3
- csrw send_ipi, a0
+ # send a self-IPI
+ csrwi mipi, 0
1: j 1b
mtvec_handler:
- csrr a0, mhartid
- bnez a0, 2f
+ bnez a2, fail
RVTEST_PASS
TEST_PASSFAIL
- 2: add a0, a0, 1
- rem a0, a0, a3
- csrw send_ipi, a0
- 1: j 1b
-
RVTEST_CODE_END
.data