r600g: fix SSG and op3 neg writing

8 more piglits, mainly the two SSG tests.

diff --git a/src/gallium/drivers/r600/r600_asm.c b/src/gallium/drivers/r600/r600_asm.c
index 03fe950186783779de9f8c7f8c394f736e000e4f..d3a9c6ca1f1a5bae812ca47d299391b927308bf4 100644 (file)
--- a/src/gallium/drivers/r600/r600_asm.c
+++ b/src/gallium/drivers/r600/r600_asm.c
@@ -340,12 +340,15 @@ static int r600_bc_alu_build(struct r600_bc *bc, struct r600_bc_alu *alu, unsign
        unsigned i;
 
        /* don't replace gpr by pv or ps for destination register */
+       bc->bytecode[id++] = S_SQ_ALU_WORD0_SRC0_SEL(alu->src[0].sel) |
+                               S_SQ_ALU_WORD0_SRC0_CHAN(alu->src[0].chan) |
+                               S_SQ_ALU_WORD0_SRC0_NEG(alu->src[0].neg) |
+                               S_SQ_ALU_WORD0_SRC1_SEL(alu->src[1].sel) |
+                               S_SQ_ALU_WORD0_SRC1_CHAN(alu->src[1].chan) |
+                               S_SQ_ALU_WORD0_SRC1_NEG(alu->src[1].neg) |
+                               S_SQ_ALU_WORD0_LAST(alu->last);
+
        if (alu->is_op3) {
-               bc->bytecode[id++] = S_SQ_ALU_WORD0_SRC0_SEL(alu->src[0].sel) |
-                                       S_SQ_ALU_WORD0_SRC0_CHAN(alu->src[0].chan) |
-                                       S_SQ_ALU_WORD0_SRC1_SEL(alu->src[1].sel) |
-                                       S_SQ_ALU_WORD0_SRC1_CHAN(alu->src[1].chan) |
-                                       S_SQ_ALU_WORD0_LAST(alu->last);
                bc->bytecode[id++] = S_SQ_ALU_WORD1_DST_GPR(alu->dst.sel) |
                                        S_SQ_ALU_WORD1_DST_CHAN(alu->dst.chan) |
                                        S_SQ_ALU_WORD1_CLAMP(alu->dst.clamp) |
@@ -355,13 +358,6 @@ static int r600_bc_alu_build(struct r600_bc *bc, struct r600_bc_alu *alu, unsign
                                        S_SQ_ALU_WORD1_OP3_ALU_INST(alu->inst) |
                                        S_SQ_ALU_WORD1_BANK_SWIZZLE(0);
        } else {
-               bc->bytecode[id++] = S_SQ_ALU_WORD0_SRC0_SEL(alu->src[0].sel) |
-                                       S_SQ_ALU_WORD0_SRC0_CHAN(alu->src[0].chan) |
-                                       S_SQ_ALU_WORD0_SRC0_NEG(alu->src[0].neg) |
-                                       S_SQ_ALU_WORD0_SRC1_SEL(alu->src[1].sel) |
-                                       S_SQ_ALU_WORD0_SRC1_CHAN(alu->src[1].chan) |
-                                       S_SQ_ALU_WORD0_SRC1_NEG(alu->src[1].neg) |
-                                       S_SQ_ALU_WORD0_LAST(alu->last);
                bc->bytecode[id++] = S_SQ_ALU_WORD1_DST_GPR(alu->dst.sel) |
                                        S_SQ_ALU_WORD1_DST_CHAN(alu->dst.chan) |
                                        S_SQ_ALU_WORD1_CLAMP(alu->dst.clamp) |

diff --git a/src/gallium/drivers/r600/r600_shader.c b/src/gallium/drivers/r600/r600_shader.c
index 82f4d73e43fe44e46afe979be5cbf42d5c3123ce..4ff705622ed29d4a082768c647ce015d0a764c41 100644 (file)
--- a/src/gallium/drivers/r600/r600_shader.c
+++ b/src/gallium/drivers/r600/r600_shader.c
@@ -1142,8 +1142,9 @@ static int tgsi_ssg(struct r600_shader_ctx *ctx)
                memset(&alu, 0, sizeof(struct r600_bc_alu));
                alu.inst = V_SQ_ALU_WORD1_OP3_SQ_OP3_INST_CNDGT;
                alu.is_op3 = 1;
+
                alu.dst.sel = ctx->temp_reg;
-               alu.dst.write = 1;
+               alu.dst.chan = i;
 
                alu.src[0] = r600_src[0];
                alu.src[0].chan = tgsi_chan(&inst->Src[0], i);
@@ -1158,6 +1159,9 @@ static int tgsi_ssg(struct r600_shader_ctx *ctx)
                if (r)
                        return r;
        }
+       r = r600_bc_add_literal(ctx->bc, ctx->value);
+       if (r)
+               return r;
 
        /* dst = (-tmp > 0 ? -1 : tmp) */
        for (i = 0; i < 4; i++) {
@@ -1169,14 +1173,15 @@ static int tgsi_ssg(struct r600_shader_ctx *ctx)
                        return r;
 
                alu.src[0].sel = ctx->temp_reg;
+               alu.src[0].chan = i;
                alu.src[0].neg = 1;
 
                alu.src[1].sel = V_SQ_ALU_SRC_1;
                alu.src[1].neg = 1;
 
                alu.src[2].sel = ctx->temp_reg;
+               alu.src[2].chan = i;
 
-               alu.dst.write = 1;
                if (i == 3)
                        alu.last = 1;
                r = r600_bc_add_alu(ctx->bc, &alu);