re PR rtl-optimization/12612 (ICE when using log function with -O3 -ffast-math)
authorJan Hubicka <jh@suse.cz>
Sun, 19 Oct 2003 18:00:12 +0000 (20:00 +0200)
committerJan Hubicka <hubicka@gcc.gnu.org>
Sun, 19 Oct 2003 18:00:12 +0000 (18:00 +0000)
* i386.c (print_reg): Do not abort on certain registers.

PR optimization/12612
* reg-stack.c (subst_stack_regs_pat):  Use st(1) for clobbers.
* i386.md (fpatan, fyl2x, fscale patterns and expanders): Use
match_scratch; avoid bogus paralles.

PR target/12674
* i386.c (ix86_function_regparm): Disable implicit register passing
conventions when profiling.

From-SVN: r72681

gcc/ChangeLog
gcc/config/i386/i386.c
gcc/config/i386/i386.md
gcc/reg-stack.c

index f82fa3d56904edb1ed878114c6c57636fcd0e64b..f65329cac4c6ea1b72ba61f93793af2d24c9f929 100644 (file)
@@ -1,3 +1,16 @@
+2003-10-19  Jan Hubicka  <jh@suse.cz>
+
+       * i386.c (print_reg): Do not abort on certain registers.
+
+       PR optimization/12612
+       * reg-stack.c (subst_stack_regs_pat):  Use st(1) for clobbers.
+       * i386.md (fpatan, fyl2x, fscale patterns and expanders): Use
+       match_scratch; avoid bogus paralles.
+
+       PR target/12674
+       * i386.c (ix86_function_regparm): Disable implicit register passing
+       conventions when profiling.
+
 2003-10-19  Eric Botcazou  <ebotcazou@libertysurf.fr>
             Richard Henderson  <rth@redhat.com>
 
index 580c393c5c4a5388716faa3723338b4c23d44823..edc8c0e6863ea5005f96cfde710ef4d08672036a 100644 (file)
@@ -1688,7 +1688,7 @@ ix86_function_regparm (tree type, tree decl)
 
       /* Use register calling convention for local functions when possible.  */
       if (!TARGET_64BIT && !user_convention && decl
-         && flag_unit_at_a_time)
+         && flag_unit_at_a_time && !profile_flag)
        {
          struct cgraph_local_info *i = cgraph_local_info (decl);
          if (i && i->local)
@@ -6884,12 +6884,6 @@ put_condition_code (enum rtx_code code, enum machine_mode mode, int reverse,
 void
 print_reg (rtx x, int code, FILE *file)
 {
-  if (REGNO (x) == ARG_POINTER_REGNUM
-      || REGNO (x) == FRAME_POINTER_REGNUM
-      || REGNO (x) == FLAGS_REG
-      || REGNO (x) == FPSR_REG)
-    abort ();
-
   if (ASSEMBLER_DIALECT == ASM_ATT || USER_LABEL_PREFIX[0] == 0)
     putc ('%', file);
 
index 65c5f0d34d805a7a2ed21b746d697671fe80af40..863dce5a4db3b7ee1bf50f20468521f9ea7af3f3 100644 (file)
    (set_attr "mode" "XF")])
 
 (define_insn "atan2df3_1"
-  [(parallel [(set (match_operand:DF 0 "register_operand" "=f")
-                  (unspec:DF [(match_operand:DF 2 "register_operand" "0")
-                              (match_operand:DF 1 "register_operand" "u")]
-                   UNSPEC_FPATAN))
-             (clobber (match_dup 1))])]
+  [(set (match_operand:DF 0 "register_operand" "=f")
+       (unspec:DF [(match_operand:DF 2 "register_operand" "0")
+                   (match_operand:DF 1 "register_operand" "u")]
+                  UNSPEC_FPATAN))
+   (clobber (match_scratch:DF 3 "=1"))]
   "! TARGET_NO_FANCY_MATH_387 && TARGET_80387
    && flag_unsafe_math_optimizations"
   "fpatan"
 })
 
 (define_insn "atan2sf3_1"
-  [(parallel [(set (match_operand:SF 0 "register_operand" "=f")
-                  (unspec:SF [(match_operand:SF 2 "register_operand" "0")
-                              (match_operand:SF 1 "register_operand" "u")]
-                   UNSPEC_FPATAN))
-             (clobber (match_dup 1))])]
+  [(set (match_operand:SF 0 "register_operand" "=f")
+        (unspec:SF [(match_operand:SF 2 "register_operand" "0")
+                   (match_operand:SF 1 "register_operand" "u")]
+                  UNSPEC_FPATAN))
+   (clobber (match_scratch:SF 3 "=1"))]
   "! TARGET_NO_FANCY_MATH_387 && TARGET_80387
    && flag_unsafe_math_optimizations"
   "fpatan"
 })
 
 (define_insn "atan2xf3_1"
-  [(parallel [(set (match_operand:XF 0 "register_operand" "=f")
-                  (unspec:XF [(match_operand:XF 2 "register_operand" "0")
-                              (match_operand:XF 1 "register_operand" "u")]
-                   UNSPEC_FPATAN))
-             (clobber (match_dup 1))])]
+  [(set (match_operand:XF 0 "register_operand" "=f")
+        (unspec:XF [(match_operand:XF 2 "register_operand" "0")
+                   (match_operand:XF 1 "register_operand" "u")]
+                  UNSPEC_FPATAN))
+   (clobber (match_scratch:XF 3 "=1"))]
   "! TARGET_NO_FANCY_MATH_387 && TARGET_80387
    && flag_unsafe_math_optimizations && ! TARGET_128BIT_LONG_DOUBLE"
   "fpatan"
 })
 
 (define_insn "atan2tf3_1"
-  [(parallel [(set (match_operand:TF 0 "register_operand" "=f")
-                  (unspec:TF [(match_operand:TF 2 "register_operand" "0")
-                              (match_operand:TF 1 "register_operand" "u")]
-                   UNSPEC_FPATAN))
-             (clobber (match_dup 1))])]
+  [(set (match_operand:TF 0 "register_operand" "=f")
+        (unspec:TF [(match_operand:TF 2 "register_operand" "0")
+                   (match_operand:TF 1 "register_operand" "u")]
+                  UNSPEC_FPATAN))
+   (clobber (match_scratch:TF 3 "=1"))]
   "! TARGET_NO_FANCY_MATH_387 && TARGET_80387
    && flag_unsafe_math_optimizations && TARGET_128BIT_LONG_DOUBLE"
   "fpatan"
 })
 
 (define_insn "*fyl2x_sfxf3"
-  [(parallel [(set (match_operand:SF 0 "register_operand" "=f")
-                  (unspec:SF [(match_operand:SF 2 "register_operand" "0")
-                              (match_operand 1 "register_operand" "u")]
+  [(set (match_operand:SF 0 "register_operand" "=f")
+         (unspec:SF [(match_operand:SF 2 "register_operand" "0")
+                    (match_operand 1 "register_operand" "u")]
                    UNSPEC_FYL2X))
-             (clobber (match_dup 1))])]
+   (clobber (match_scratch:SF 3 "=1"))]
   "! TARGET_NO_FANCY_MATH_387 && TARGET_80387
    && flag_unsafe_math_optimizations
    && GET_MODE (operands[1]) == (TARGET_128BIT_LONG_DOUBLE ? TFmode : XFmode)"
    (set_attr "mode" "SF")])
 
 (define_insn "*fyl2x_dfxf3"
-  [(parallel [(set (match_operand:DF 0 "register_operand" "=f")
-                  (unspec:DF [(match_operand:DF 2 "register_operand" "0")
-                              (match_operand 1 "register_operand" "u")]
+  [(set (match_operand:DF 0 "register_operand" "=f")
+         (unspec:DF [(match_operand:DF 2 "register_operand" "0")
+                    (match_operand 1 "register_operand" "u")]
                    UNSPEC_FYL2X))
-             (clobber (match_dup 1))])]
+   (clobber (match_scratch:DF 3 "=1"))]
   "! TARGET_NO_FANCY_MATH_387 && TARGET_80387
    && flag_unsafe_math_optimizations
    && GET_MODE (operands[1]) == (TARGET_128BIT_LONG_DOUBLE ? TFmode : XFmode)"
    (set_attr "mode" "DF")])
 
 (define_insn "*fyl2x_xf3"
-  [(parallel [(set (match_operand:XF 0 "register_operand" "=f")
-                  (unspec:XF [(match_operand:XF 2 "register_operand" "0")
-                              (match_operand:XF 1 "register_operand" "u")]
-                   UNSPEC_FYL2X))
-             (clobber (match_dup 1))])]
+  [(set (match_operand:XF 0 "register_operand" "=f")
+        (unspec:XF [(match_operand:XF 2 "register_operand" "0")
+                   (match_operand:XF 1 "register_operand" "u")]
+                  UNSPEC_FYL2X))
+   (clobber (match_scratch:XF 3 "=1"))]
   "! TARGET_NO_FANCY_MATH_387 && TARGET_80387
    && flag_unsafe_math_optimizations && !TARGET_128BIT_LONG_DOUBLE"
   "fyl2x"
    (set_attr "mode" "XF")])
 
 (define_insn "*fyl2x_tfxf3"
-  [(parallel [(set (match_operand:TF 0 "register_operand" "=f")
-                  (unspec:TF [(match_operand:TF 2 "register_operand" "0")
-                              (match_operand:TF 1 "register_operand" "u")]
+  [(set (match_operand:TF 0 "register_operand" "=f")
+       (unspec:TF [(match_operand:TF 2 "register_operand" "0")
+                   (match_operand:TF 1 "register_operand" "u")]
                    UNSPEC_FYL2X))
-             (clobber (match_dup 1))])]
+   (clobber (match_scratch:TF 3 "=1"))]
   "! TARGET_NO_FANCY_MATH_387 && TARGET_80387
    && flag_unsafe_math_optimizations && TARGET_128BIT_LONG_DOUBLE"
   "fyl2x"
   [(parallel [(set (match_operand:SF 0 "register_operand" "")
                   (unspec:SF [(match_operand:SF 1 "register_operand" "")
                               (match_dup 2)] UNSPEC_FYL2X))
-             (clobber (match_dup 2))])]
+             (clobber (match_scratch:SF 3 ""))])]
   "! TARGET_NO_FANCY_MATH_387 && TARGET_80387
    && flag_unsafe_math_optimizations"
 {
   [(parallel [(set (match_operand:DF 0 "register_operand" "")
                   (unspec:DF [(match_operand:DF 1 "register_operand" "")
                               (match_dup 2)] UNSPEC_FYL2X))
-             (clobber (match_dup 2))])]
+             (clobber (match_scratch:DF 3 ""))])]
   "! TARGET_NO_FANCY_MATH_387 && TARGET_80387
    && flag_unsafe_math_optimizations"
 {
   [(parallel [(set (match_operand:XF 0 "register_operand" "")
                   (unspec:XF [(match_operand:XF 1 "register_operand" "")
                               (match_dup 2)] UNSPEC_FYL2X))
-             (clobber (match_dup 2))])]
+             (clobber (match_scratch:XF 3 ""))])]
   "! TARGET_NO_FANCY_MATH_387 && TARGET_80387
    && flag_unsafe_math_optimizations && !TARGET_128BIT_LONG_DOUBLE"
 {
   [(parallel [(set (match_operand:TF 0 "register_operand" "")
                   (unspec:TF [(match_operand:TF 1 "register_operand" "")
                               (match_dup 2)] UNSPEC_FYL2X))
-             (clobber (match_dup 2))])]
+             (clobber (match_scratch:TF 3 ""))])]
   "! TARGET_NO_FANCY_MATH_387 && TARGET_80387
    && flag_unsafe_math_optimizations && TARGET_128BIT_LONG_DOUBLE"
 {
 })
 
 (define_insn "*fscale_sfxf3"
-  [(parallel [(set (match_operand:SF 0 "register_operand" "=f")
-                  (unspec:SF [(match_operand 2 "register_operand" "0")
-                              (match_operand 1 "register_operand" "u")]
+  [(set (match_operand:SF 0 "register_operand" "=f")
+        (unspec:SF [(match_operand 2 "register_operand" "0")
+                    (match_operand 1 "register_operand" "u")]
                    UNSPEC_FSCALE))
-             (clobber (match_dup 1))])]
+   (clobber (match_scratch:SF 3 "=1"))]
   "! TARGET_NO_FANCY_MATH_387 && TARGET_80387
    && flag_unsafe_math_optimizations
    && GET_MODE (operands[1]) == (TARGET_128BIT_LONG_DOUBLE ? TFmode : XFmode)
    (set_attr "mode" "SF")])
 
 (define_insn "*fscale_dfxf3"
-  [(parallel [(set (match_operand:DF 0 "register_operand" "=f")
-                  (unspec:DF [(match_operand 2 "register_operand" "0")
-                              (match_operand 1 "register_operand" "u")]
+  [(set (match_operand:DF 0 "register_operand" "=f")
+        (unspec:DF [(match_operand 2 "register_operand" "0")
+                    (match_operand 1 "register_operand" "u")]
                    UNSPEC_FSCALE))
-             (clobber (match_dup 1))])]
+   (clobber (match_scratch:DF 3 "=1"))]
   "! TARGET_NO_FANCY_MATH_387 && TARGET_80387
    && flag_unsafe_math_optimizations
    && GET_MODE (operands[1]) == (TARGET_128BIT_LONG_DOUBLE ? TFmode : XFmode)
    (set_attr "mode" "DF")])
 
 (define_insn "*fscale_xf3"
-  [(parallel [(set (match_operand:XF 0 "register_operand" "=f")
-                  (unspec:XF [(match_operand:XF 2 "register_operand" "0")
-                              (match_operand:XF 1 "register_operand" "u")]
-                   UNSPEC_FSCALE))
-             (clobber (match_dup 1))])]
+  [(set (match_operand:XF 0 "register_operand" "=f")
+       (unspec:XF [(match_operand:XF 2 "register_operand" "0")
+                   (match_operand:XF 1 "register_operand" "u")]
+                  UNSPEC_FSCALE))
+   (clobber (match_scratch:XF 3 "=1"))]
   "! TARGET_NO_FANCY_MATH_387 && TARGET_80387
    && flag_unsafe_math_optimizations && !TARGET_128BIT_LONG_DOUBLE"
   "fscale\;fstp\t%y1"
    (set_attr "mode" "XF")])
 
 (define_insn "*fscale_tf3"
-  [(parallel [(set (match_operand:TF 0 "register_operand" "=f")
-                  (unspec:TF [(match_operand:TF 2 "register_operand" "0")
-                              (match_operand:TF 1 "register_operand" "u")]
-                   UNSPEC_FSCALE))
-             (clobber (match_dup 1))])]
+  [(set (match_operand:TF 0 "register_operand" "=f")
+       (unspec:TF [(match_operand:TF 2 "register_operand" "0")
+                   (match_operand:TF 1 "register_operand" "u")]
+                  UNSPEC_FSCALE))
+   (clobber (match_scratch:TF 3 "=1"))]
   "! TARGET_NO_FANCY_MATH_387 && TARGET_80387
    && flag_unsafe_math_optimizations && TARGET_128BIT_LONG_DOUBLE"
   "fscale\;fstp\t%y1"
    (set (match_dup 9) (plus:XF (match_dup 7) (match_dup 8)))
    (parallel [(set (match_operand:SF 0 "register_operand" "")
                   (unspec:SF [(match_dup 9) (match_dup 5)] UNSPEC_FSCALE))
-             (clobber (match_dup 5))])]
+             (clobber (match_scratch:SF 5 ""))])]
   "! TARGET_NO_FANCY_MATH_387 && TARGET_80387
    && flag_unsafe_math_optimizations"
 {
    (set (match_dup 9) (plus:TF (match_dup 7) (match_dup 8)))
    (parallel [(set (match_operand:SF 0 "register_operand" "")
                   (unspec:SF [(match_dup 9) (match_dup 5)] UNSPEC_FSCALE))
-             (clobber (match_dup 5))])]
+             (clobber (match_scratch:SF 5 ""))])]
   ""
 {
   rtx temp;
    (set (match_dup 9) (plus:XF (match_dup 7) (match_dup 8)))
    (parallel [(set (match_operand:DF 0 "register_operand" "")
                   (unspec:DF [(match_dup 9) (match_dup 5)] UNSPEC_FSCALE))
-             (clobber (match_dup 5))])]
+             (clobber (match_scratch:DF 5 ""))])]
   "! TARGET_NO_FANCY_MATH_387 && TARGET_80387
    && flag_unsafe_math_optimizations"
 {
    (set (match_dup 9) (plus:TF (match_dup 7) (match_dup 8)))
    (parallel [(set (match_operand:DF 0 "register_operand" "")
                   (unspec:DF [(match_dup 9) (match_dup 5)] UNSPEC_FSCALE))
-             (clobber (match_dup 5))])]
+             (clobber (match_scratch:DF 5 ""))])]
    ""
 {
   rtx temp;
    (set (match_dup 8) (plus:XF (match_dup 6) (match_dup 7)))
    (parallel [(set (match_operand:XF 0 "register_operand" "")
                   (unspec:XF [(match_dup 8) (match_dup 4)] UNSPEC_FSCALE))
-             (clobber (match_dup 4))])]
+             (clobber (match_scratch:XF 5 ""))])]
   "! TARGET_NO_FANCY_MATH_387 && TARGET_80387
    && flag_unsafe_math_optimizations && !TARGET_128BIT_LONG_DOUBLE"
 {
    (set (match_dup 8) (plus:TF (match_dup 6) (match_dup 7)))
    (parallel [(set (match_operand:TF 0 "register_operand" "")
                   (unspec:TF [(match_dup 8) (match_dup 4)] UNSPEC_FSCALE))
-             (clobber (match_dup 4))])]
+             (clobber (match_scratch:TF 5 ""))])]
   "! TARGET_NO_FANCY_MATH_387 && TARGET_80387
    && flag_unsafe_math_optimizations && TARGET_128BIT_LONG_DOUBLE"
 {
                   (unspec:DF [(match_dup 2)
                               (match_operand:DF 1 "register_operand" "")]
                    UNSPEC_FPATAN))
-             (clobber (match_dup 1))])]
+             (clobber (match_scratch:DF 3 ""))])]
   "! TARGET_NO_FANCY_MATH_387 && TARGET_80387
    && flag_unsafe_math_optimizations"
 {
                   (unspec:XF [(match_dup 2)
                               (match_operand:XF 1 "register_operand" "")]
                    UNSPEC_FPATAN))
-             (clobber (match_dup 1))])]
+             (clobber (match_scratch:XF 3 ""))])]
   "! TARGET_NO_FANCY_MATH_387 && TARGET_80387
    && flag_unsafe_math_optimizations && !TARGET_128BIT_LONG_DOUBLE"
 {
                   (unspec:TF [(match_dup 2)
                               (match_operand:TF 1 "register_operand" "")]
                    UNSPEC_FPATAN))
-             (clobber (match_dup 1))])]
+             (clobber (match_scratch:TF 3 ""))])]
   "! TARGET_NO_FANCY_MATH_387 && TARGET_80387
    && flag_unsafe_math_optimizations && TARGET_128BIT_LONG_DOUBLE"
 {
index e1833bce85ad08e8b5dac9b32860edb4bf38ad17..fe1bc23ff48a003bacc2e517e4ac0bb652b3b15e 100644 (file)
@@ -1430,7 +1430,7 @@ subst_stack_regs_pat (rtx insn, stack regstack, rtx pat)
                      abort ();
                  }
                remove_note (insn, note);
-               replace_reg (dest, LAST_STACK_REG);
+               replace_reg (dest, FIRST_STACK_REG + 1);
              }
            else
              {