cpuid, x86: Revert "Enabling more features in CPUid"

That change enables CPUID bits for features that aren't implemented in gem5.
If a simulated system tries to use those features because it was told it
could, bad things can happen.

diff --git a/src/arch/x86/cpuid.cc b/src/arch/x86/cpuid.cc
index de11195e007009d711b6e3dab2eb3eb860a506e1..f3f9a82d7a2a043e46d428eae9061d9484659f11 100644 (file)
--- a/src/arch/x86/cpuid.cc
+++ b/src/arch/x86/cpuid.cc
@@ -96,15 +96,8 @@ namespace X86ISA {
                         stringToRegister(vendorString + 8));
                 break;
               case FamilyModelSteppingBrandFeatures:
-                /** Features Enabling
-                 * rdx, enabling most of the features except:
-                 * FXSR, FFXSR, Page1GB in EDX
-                 *
-                 * rcx, disabling most of the features except:
-                 * SSE4A, XOP, FMA4 in ECX
-                 */
                 result = CpuidResult(0x00020f51, 0x00000405,
-                                     0xe3d3fbff, 0x00010840);
+                                     0xe3d3fbff, 0x00000001);
                 break;
               case NameString1:
               case NameString2:
@@ -160,15 +153,8 @@ namespace X86ISA {
                         stringToRegister(vendorString + 8));
                 break;
               case FamilyModelStepping:
-                /** Features Enabling
-                 * rdx, enabling most of the features except:
-                 * HTT in EDX
-                 *
-                 * rcx, disabling most of the features except:
-                 * SSE3, SSSE3, FMA, SSE41, XSAVE, AVX in ECX
-                 */
                 result = CpuidResult(0x00020f51, 0x00000805,
-                                     0xe7dbfbff, 0x14081201);
+                                     0xe7dbfbff, 0x00000001);
                 break;
               default:
                 warn("x86 cpuid: unimplemented function %u", funcNum);