+2008-06-03 H.J. Lu <hongjiu.lu@intel.com>
+
+ * config/tc-i386.c (set_sse_check): New.
+ (md_pseudo_table): Add "sse_check".
+
2008-06-03 Paul Brook <paul@codesourcery.com>
* config/tc-arm.c (do_t_rbit): Populate both rm fields.
static void set_intel_syntax (int);
static void set_intel_mnemonic (int);
static void set_allow_index_reg (int);
+static void set_sse_check (int);
static void set_cpu_arch (int);
#ifdef TE_PE
static void pe_directive_secrel (int);
{"att_mnemonic", set_intel_mnemonic, 0},
{"allow_index_reg", set_allow_index_reg, 1},
{"disallow_index_reg", set_allow_index_reg, 0},
+ {"sse_check", set_sse_check, 0},
#if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
{"largecomm", handle_large_common, 0},
#else
allow_index_reg = flag;
}
+static void
+set_sse_check (int dummy ATTRIBUTE_UNUSED)
+{
+ SKIP_WHITESPACE ();
+
+ if (!is_end_of_line[(unsigned char) *input_line_pointer])
+ {
+ char *string = input_line_pointer;
+ int e = get_symbol_end ();
+
+ if (strcmp (string, "none") == 0)
+ sse_check = sse_check_none;
+ else if (strcmp (string, "warning") == 0)
+ sse_check = sse_check_warning;
+ else if (strcmp (string, "error") == 0)
+ sse_check = sse_check_error;
+ else
+ as_bad (_("bad argument to sse_check directive."));
+ *input_line_pointer = e;
+ }
+ else
+ as_bad (_("missing argument for sse_check directive"));
+
+ demand_empty_rest_of_line ();
+}
+
static void
set_cpu_arch (int dummy ATTRIBUTE_UNUSED)
{
+2008-06-03 H.J. Lu <hongjiu.lu@intel.com>
+
+ * gas/i386/i386.exp: Run sse-check-none and
+ x86-64-sse-check-none.
+
+ * gas/i386/sse-check-none.d: New.
+ * gas/i386/sse-check-none.s: Likewise.
+ * gas/i386/x86-64-sse-check-none.d: Likewise.
+
2008-06-03 Paul Brook <paul@codesourcery.com>
* gas/arm/thumb32.d: Update expected output.
run_dump_test "sse2avx"
run_list_test "inval-avx" "-al"
run_dump_test "sse-check"
+ run_dump_test "sse-check-none"
run_dump_test "sse-check-warn"
run_list_test "sse-check-error" "-msse-check=error -I${srcdir}/$subdir -al"
run_dump_test "sse-noavx"
run_dump_test "x86-64-sse2avx"
run_list_test "x86-64-inval-avx" "-al"
run_dump_test "x86-64-sse-check"
+ run_dump_test "x86-64-sse-check-none"
run_dump_test "x86-64-sse-check-warn"
run_list_test "x86-64-sse-check-error" "-msse-check=error -I${srcdir}/$subdir -al"
run_dump_test "x86-64-sse-noavx"
--- /dev/null
+#as: -msse-check=error
+#objdump: -dw
+#name: i386 SSE check (.sse_check none)
+
+.*: file format .*
+
+Disassembly of section .text:
+
+0+ <_start>:
+[ ]*[a-f0-9]+: 0f 58 ca addps %xmm2,%xmm1
+[ ]*[a-f0-9]+: 66 0f 58 ca addpd %xmm2,%xmm1
+[ ]*[a-f0-9]+: 66 0f d0 ca addsubpd %xmm2,%xmm1
+[ ]*[a-f0-9]+: 66 0f 38 01 ca phaddw %xmm2,%xmm1
+[ ]*[a-f0-9]+: 66 0f 38 15 c1 blendvpd %xmm0,%xmm1,%xmm0
+[ ]*[a-f0-9]+: 66 0f 38 37 c1 pcmpgtq %xmm1,%xmm0
+#pass
--- /dev/null
+# Check SSE instructions
+
+ .sse_check none
+ .text
+_start:
+
+# SSE instruction
+ addps %xmm2,%xmm1
+
+# SSE2 instruction
+ addpd %xmm2,%xmm1
+
+# SSE3 instruction
+ addsubpd %xmm2,%xmm1
+
+# SSSE3 instruction
+ phaddw %xmm2,%xmm1
+
+# SSE4 instructions
+ blendvpd %xmm0,%xmm1,%xmm0
+ pcmpgtq %xmm1,%xmm0
--- /dev/null
+#source: sse-check-none.s
+#as: -msse-check=error
+#objdump: -dw
+#name: x86-64 SSE check (.sse_check none)
+
+.*: file format .*
+
+Disassembly of section .text:
+
+0+ <_start>:
+[ ]*[a-f0-9]+: 0f 58 ca addps %xmm2,%xmm1
+[ ]*[a-f0-9]+: 66 0f 58 ca addpd %xmm2,%xmm1
+[ ]*[a-f0-9]+: 66 0f d0 ca addsubpd %xmm2,%xmm1
+[ ]*[a-f0-9]+: 66 0f 38 01 ca phaddw %xmm2,%xmm1
+[ ]*[a-f0-9]+: 66 0f 38 15 c1 blendvpd %xmm0,%xmm1,%xmm0
+[ ]*[a-f0-9]+: 66 0f 38 37 c1 pcmpgtq %xmm1,%xmm0
+#pass