CODEOWNERS: add @zachjs as Verilog/AST frontend owner

diff --git a/CODEOWNERS b/CODEOWNERS
index 350a62120b559fe15e0691abf379468744118275..0419e6e4410a60513b47a1c03fbc7d92f1e2667c 100644 (file)
--- a/CODEOWNERS
+++ b/CODEOWNERS
@@ -25,6 +25,9 @@ passes/opt/opt_lut.cc          @whitequark
 # These still override previous lines, so be careful not to
 # accidentally disable any of the above rules.
 
+frontends/verilog/             @zachjs
+frontends/ast/                 @zachjs
+
 techlibs/intel_alm/            @ZirconiumX
 
 # pyosys